Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 System description Page 32 of 123
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1.9.1 UART interfaces
1.9.1.1 UART features
SARA-R5 series modules include 1.8 V unbalanced asynchronous serial interfaces (UART) for
communications with external host application processor.
UART can be configured by dedicated AT command (see the SARA-R5 series AT commands
manual [2], +USIO AT command) in the following variants:
Variant 0 (default configuration), consisting in a single UART interface on RXD, TXD, CTS, RTS,
DTR, RI pins, supporting:
o AT commands
o data communication
o multiplexer protocol functionality (see 1.9.1.3)
o FW update by means of FOAT
o FW update by means of the u-blox EasyFlash tool
The following lines are provided:
o data lines (RXD as output, TXD as input)
o hardware flow control lines (CTS as output, RTS as input)
o modem status and control lines (DTR as input, RI as output)
Variant 1, consisting in a single UART interface on RXD, TXD, CTS, RTS, DTR, DSR, DCD, RI pins,
supporting:
o AT commands
o data communication
o multiplexer protocol functionality (see 1.9.1.3)
o FW update by means of FOAT
o FW update by means of the u-blox EasyFlash tool
The following lines are provided:
o data lines (RXD as output, TXD as input)
o hardware flow control lines (CTS as output, RTS as input)
o modem status and control lines (DTR as input, DSR as output, DCD as output, RI as output)
Variants 2, 3 and 4, consisting in two UART interfaces (first primary UART on RXD, TXD, CTS, RTS
pins, and second auxiliary UART on DCD, DTR, RI, DSR pins) plus ring indication and DTR functions:
o First primary UART interface supports:
AT commands
data communication
multiplexer protocol functionality (see 1.9.1.3)
FW update by means of FOAT
FW update by means of the u-blox EasyFlash tool
The following lines are provided:
data lines (RXD as output, TXD as input)
hardware flow control lines (CTS as output, RTS as input)
o Second auxiliary UART interface supports:
AT commands (variant 2 only)
data communication (variant 2 only)
FW update by means of FOAT (variant 2 only)
diagnostic trace log (variant 3 only)
GNSS tunneling (variant 4 only)