Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 System description Page 18 of 123
Confidential
Item
Requirement
Remark
VCC current
Support with adequate margin the highest
averaged VCC current consumption value
during Tx conditions specified in the SARA-R5
series data sheet [1]
The maximum average current consumption can
be greater than the specified value according to
the actual antenna mismatching, temperature and
supply voltage.
Section 1.5.1.2 describes current consumption
profiles in connected mode.
VCC voltage ripple
Noise in the supply pins must be minimized
High supply voltage ripple values during RF
transmissions in connected mode directly affect
the RF compliance with the applicable certification
schemes.
Table 5: Summary of VCC modules supply requirements
1.5.1.2 VCC current consumption in LTE connected mode
During an LTE connection, the SARA-R5 series modules transmit and receive in half duplex mode.
The current consumption depends on output RF power, which is always regulated by the network (the
current base station) sending power control commands to the module. These power control
commands are logically divided into a slot of 0.5 ms (time length of one Resource Block), thus the rate
of power change can reach a maximum rate of 2 kHz.
Figure 7 shows an example of SARA-R5 series modules’ current consumption profile versus time in
connected mode: transmission is enabled for one sub-frame (1 ms) according to LTE Category M1
half-duplex connected mode.
Detailed current consumption values can be found in the SARA-R5 series data sheet [1].
Time
[ms]
Current [mA]
0
300
200
100
500
400
Current consumption value
depends on TX power and
actual antenna load
1 Slot
1 Resource Block
(0.5 ms)
1 LTE Radio Frame
(10 ms)
1 Slot
1 Resource Block
(0.5 ms)
1 LTE Radio Frame
(10 ms)
Figure 7: VCC current consumption profile versus time during LTE Cat M1 half-duplex connection
1.5.1.3 VCC consumption in deep-sleep mode
(low power mode and PSM enabled)
The low power mode and the PSM configurations are by default disabled, but they can be enabled
using the +UPSV and +CPSMS AT commands (see the SARA-R5 series AT commands manual [2]).
When low power mode and PSM are enabled, whenever possible the modules automatically enter the
PSM deep-sleep mode (SARA-R500S and SARA-R510M8S modules) or the ultra-low power PSM
deep-sleep mode (SARA-R510S), reducing current consumption down to the lowest steady value: only
the RTC runs with internal 32 kHz reference clock frequency.