Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 Appendix Page 113 of 123
Confidential
No
SARA-R41x
SARA-R42x
SARA-R5xx
SARA-N2xx
SARA-N3xx
SARA-G3xx
SARA-G4xx
SARA-U2xx
36
I2S_CLK / SPI_CLK
I2S_CLK
I2S_CLK
RSVD
RSVD
I2S_CLK
I2S_CLK
I2S_CLK
I2S clock
19
/ SPI clock
19
V_INT level (1.8 V)
Driver strength: 2 mA
I2S clock
20
V_INT level (1.8 V)
Driver strength: 2 mA
I2S clock
20
V_INT level (1.8 V)
Reserved
Reserved
I2S clock
V_INT level (1.8 V)
Driver strength: 5 mA
I2S clock
14
V_INT level (1.8 V / 3.0 V)
I2S clock / GPIO
V_INT level (1.8 V)
Driver strength: 2 mA
37
I2S_RXD / SPI_MISO
I2S_RXD
I2S_RXD
RSVD
RSVD
I2S_RXD
I2S_RXD
I2S_RXD
I2S input
21
/ SPI MISO
21
V_INT level (1.8 V)
I2S input
22
V_INT level (1.8 V)
I2S data input
22
V_INT level (1.8 V)
Reserved
Reserved
I2S data input
V_INT level (1.8 V)
Internal pull-down: ~18 kΩ
I2S data input
14
V_INT level (1.8 V / 3.0 V)
I2S data input / GPIO
V_INT level (1.8 V)
Internal pull-down: ~8 kΩ
38
SIM_CLK
SIM_CLK
SIM_CLK
SIM_CLK
SIM_CLK
SIM_CLK
SIM_CLK
SIM_CLK
1.8 V / 3 V SIM clock
1.8 V / 3 V SIM clock
1.8 V / 3 V SIM clock
1.8 V SIM clock
1.8 V / 3 V SIM clock
1.8 V / 3 V SIM clock
1.8 V / 3 V SIM clock
1.8 V / 3 V SIM clock
39
SIM_IO
SIM_IO
SIM_IO
SIM_IO
SIM_IO
SIM_IO
SIM_IO
SIM_IO
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
1.8 V / 3 V SIM data I/O
Internal pull-up: 4.7 kΩ
40
SIM_RST
SIM_RST
SIM_RST
SIM_RST
SIM_RST
SIM_RST
SIM_RST
SIM_RST
1.8 V / 3 V SIM reset
1.8 V / 3 V SIM reset
1.8 V / 3 V SIM reset
1.8 V SIM reset
1.8 V / 3 V SIM reset
1.8 V / 3 V SIM reset
1.8 V / 3 V SIM reset
1.8 V / 3 V SIM reset
41
VSIM
VSIM
VSIM
VSIM
VSIM
VSIM
VSIM
VSIM
1.8 V / 3 V SIM supply
1.8 V / 3 V SIM supply
1.8 V / 3 V SIM supply
1.8 V SIM supply
1.8 V / 3 V SIM supply
1.8 V / 3 V SIM supply
1.8 V / 3 V SIM supply
1.8 V / 3 V SIM supply
42
GPIO5
GPIO5
GPIO5
RSVD
GPIO5
SIM_DET
SIM_DET
SIM_DET
GPIO / SIM detection input
V_INT level (1.8 V)
Driver strength: 2 mA
GPIO / SIM detection input
V_INT level (1.8 V)
Driver strength: 2 mA
SIM detection input
V_INT level (1.8 V)
Driver strength: 2 mA
Reserved
SIM detection input / GPIO
V_INT level (1.8 / 2.8 V)
Driver strength: 3 mA
SIM detection input
V_INT level (1.8 V)
SIM detection input
V_INT level (1.8 V / 3.0 V)
SIM detection input
V_INT level (1.8 V)
Configurable as GPIO
43
GND
GND
GND
GND
GND
GND
GND
GND
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
44
SDIO_D2
ANT_ON
SDIO_D2
RSVD
RSVD
SPK_P
SPK_P
RSVD
SDIO serial data [2]
21
GNSS LNA on/off signal
connected to internal LNA
SDIO serial data [2]
22
Configurable as SPI_CLK
(diagnostic only)
Reserved
Reserved
Analog audio output (+)
Analog audio output (+)
14
Reserved
45
SDIO_CLK
TIMEPULSE
SDIO_CLK
RSVD
RSVD
SPK_N
SPK_N
RSVD
SDIO serial clock
21
GNSS time pulse output
SDIO serial clock
22
Reserved
Reserved
Analog audio output (-)
Analog audio output (-)
14
Reserved
46
SDIO_CMD
EXTINT
SDIO_CMD
RSVD
RSVD
MIC_BIAS
MIC_BIAS
RSVD
SDIO command
21
GNSS external interrupt
SDIO command
22
Configurable as Time
Synchronization Input
Reserved
Reserved
Microphone supply
Microphone supply
14
Reserved
47
SDIO_D0
RSVD
SDIO_D0
RSVD
RSVD
MIC_GND
MIC_GND
RSVD
SDIO serial data [0]
21
Reserved
SDIO serial data [0]
22
Configurable as SPI_MOSI
(diagnostic only)
Reserved
Reserved
Microphone ground
Microphone ground
14
Reserved
48
SDIO_D3
RSVD
SDIO_D3
RSVD
RSVD
MIC_N
MIC_N
RSVD
SDIO serial data [3]
21
Reserved
SDIO serial data [3]
22
Configurable as SPI_CS
(diagnostic only)
Reserved
Reserved
Analog audio input (-)
Analog audio input (-)
14
Reserved
21
Not supported by ‘00’, ‘01’, ‘x2’ and ‘x3’ product versions
22
Not supported by ‘00’ product version