Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 Appendix Page 110 of 123
Confidential
No
SARA-R41x
SARA-R42x
SARA-R5xx
SARA-N2xx
SARA-N3xx
SARA-G3xx
SARA-G4xx
SARA-U2xx
9
DTR
DTR
DTR
RSVD
DTR
DTR
DTR
DTR
UART DTR input
V_INT level (1.8 V)
Internal pull-up: ~100 kΩ
Set low for URCs/Greeting
UART DTR input
V_INT level (1.8 V)
Internal pull-up: ~100 kΩ
Set low for greeting text
UART DTR input
V_INT level (1.8 V)
Internal pull-up: ~56 kΩ
Set low for greeting text
Configurable as TXD for
second auxiliary UART
Reserved
UART DTR input
14
V_INT level (1.8 / 2.8 V)
UART DTR input
V_INT level (1.8 V)
Internal pull-up: ~33 kΩ
UART DTR input
V_INT level (1.8 / 3.0 V)
Internal pull-up: ~166 kΩ
UART DTR input
V_INT level (1.8 V)
Internal pull-up: ~14 kΩ
Set low for greeting text
10
RTS
RTS
RTS
RTS
RTS
RTS
RTS
RTS
UART RTS input
V_INT level (1.8 V)
Internal pull-up: ~100 kΩ
Must be low to use UART
on ‘00’, ‘01’ versions
UART RTS input
V_INT level (1.8 V)
Internal pull-up: ~100 kΩ
UART RTS input
V_INT level (1.8 V)
Internal pull-up: ~56 kΩ
UART RTS input
15
VCC level (3.6 V typ.)
Internal pull-up: ~78 kΩ
UART RTS input
V_INT level (1.8 / 2.8 V)
Internal pull-up: ~171 kΩ
Configurable as GPIO
UART RTS input
V_INT level (1.8 V)
Internal pull-up:~58 kΩ
UART RTS input
V_INT level (1.8 / 3.0 V)
Internal pull-up: ~166 kΩ
UART RTS input
V_INT level (1.8 V)
Internal pull-up: ~8 kΩ
11
CTS
CTS
CTS
CTS
CTS
CTS
CTS
CTS
UART CTS output
V_INT level (1.8 V)
Driver strength: 2 mA
UART CTS output
V_INT level (1.8 V)
Driver strength: 2 mA
UART CTS output
V_INT level (1.8 V)
Driver strength: 2 mA
UART CTS output
15
VCC level (3.6 V typ.)
Driver strength: 1 mA
Configurable as RI or
Network Indicator
UART CTS output
V_INT level (1.8 / 2.8 V)
Driver strength: 3 mA
Configurable as GPIO or
Network Indicator
UART CTS output
V_INT level (1.8 V)
Driver strength: 6 mA
UART CTS output
V_INT level (1.8 / 3.0 V)
Driver strength: 3 mA
UART CTS output
V_INT level (1.8 V)
Driver strength: 6 mA
12
TXD
TXD
TXD
TXD
TXD
TXD
TXD
TXD
UART data input
V_INT level (1.8 V)
Internal PU/PD ~100 kΩ
UART data input
V_INT level (1.8 V)
Internal pull-up ~100 kΩ
UART data input
V_INT level (1.8 V)
Internal pull-up: ~56 kΩ
UART data input
VCC level (3.6 V typ.)
No internal pull-up/down
UART data input
V_INT level (1.8 / 2.8 V)
Internal pull-up: ~171 kΩ
UART data input
V_INT level (1.8 V)
Internal pull-up:~18 kΩ
UART data input
V_INT level (1.8 / 3.0 V)
Internal pull-up: ~166 kΩ
UART data input
V_INT level (1.8 V)
Internal pull-up: ~8 kΩ
13
RXD
RXD
RXD
RXD
RXD
RXD
RXD
RXD
UART data output
V_INT level (1.8 V)
Driver strength: 2 mA
UART data output
V_INT level (1.8 V)
Driver strength: 2 mA
UART data output
V_INT level (1.8 V)
Driver strength: 2 mA
UART data output
VCC level (3.6 V typ.)
Driver strength: 1 mA
UART data output
V_INT level (1.8 / 2.8 V)
Driver strength: 3 mA
UART data output
V_INT level (1.8 V)
Driver strength: 6 mA
UART data output
V_INT level (1.8 / 3.0 V)
Driver strength: 3 mA
UART data output
V_INT level (1.8 V)
Driver strength: 6 mA
14
GND
GND
GND
GND
GND
GND
GND
GND
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
15
PWR_ON
PWR_CTRL
PWR_ON
RSVD
PWR_ON
PWR_ON
PWR_ON
PWR_ON
Power-on/off input
Internal pull-up: ~200 kΩ
L-level: -0.30 ÷ 0.35 V
ON L-level time:
0.15 s min – 3.2 s max
OFF L-level pulse time:
1.5 s min
TestPoint recommended
Power-on/off / Reset input
Internal pull-up
L-level: -0.30 ÷ 0.35 V
ON L-level pulse time:
0.01 s min – 1.7 s max
OFF L-level pulse time:
1.5 s min – 14 s max
Reset L-level pulse time:
16 s min
TestPoint recommended
Power-on/off input
Internal pull-up: ~10 kΩ
L-level: -0.30 ÷ 0.30 V
ON L-level time:
1 s min – 2 s max
OFF L-level pulse time:
1 s min – 5 s max
TestPoint recommended
Reserved
Power-on/off input
Internal pull-up: ~90 kΩ
L-level: 0.00 ÷ 0.20 V
ON L-level pulse time:
1 s min – 2.5 s max
OFF L-level pulse time:
2.5 s min
TestPoint recommended
Power-on input
No internal pull-up
L-level: -0.10 ÷ 0.65 V
ON L-level time:
5 ms min
OFF L-level pulse time:
Not Available
TestPoint recommended
Power-on input
Internal pull-up: ~28 kΩ
L-level: 0.00 ÷ 0.30 V
ON L-level time:
2 s min
OFF L-level time:
Not Available
TestPoint recommended
Power-on/off input
No internal pull-up
L-level: -0.30 ÷ 0.65 V
ON L-level pulse time:
50 µs min / 80 µs max
OFF L-level pulse time:
1 s min
TestPoint recommended
15
Not supported by ‘02’ product version