SARA-R5 series Multi-band LTE-M / NB-IoT modules System integration manual Abstract This document describes the features and the integration of the size-optimized SARA-R5 series cellular modules, based on the u-blox UBX-R5 cellular chipset. The modules are a size-optimized solution specifically designed for IoT, integrating an in-house developed cellular modem, end-to-end trusted domain security and u-blox’s leading GNSS technology.
SARA-R5 series - System integration manual Document information Title SARA-R5 series Subtitle Multi-band LTE-M / NB-IoT modules Document type System integration manual Document number UBX-19041356 Revision and date R03 Disclosure restriction Confidential 26-Mar-2020 Product status Corresponding content status Functional sample Draft For functional testing. Revised and supplementary data will be published later. In development / Prototype Objective specification Target values.
SARA-R5 series - System integration manual Contents Document information ................................................................................................................................ 2 Contents .......................................................................................................................................................... 3 1 System description .......................................................................................................................
SARA-R5 series - System integration manual 2.4.1 General guidelines for antenna interfaces .................................................................................. 52 2.4.2 Cellular antenna RF interface (ANT) ............................................................................................. 56 2.4.3 GNSS antenna RF interface (ANT_GNSS) ................................................................................... 62 2.4.4 Cellular antenna detection interface (ANT_DET) ......
SARA-R5 series - System integration manual 4 Approvals............................................................................................................................................... 96 4.1 Product certification approval overview ............................................................................................... 96 4.2 US Federal Communications Commission notice .............................................................................. 97 4.2.
SARA-R5 series - System integration manual 1 System description 1.1 Overview The SARA-R5 series LTE Cat M1 / NB2 modules are ideal solutions for IoT, in the miniature SARA LGA form factor (26.0 x 16.0 mm, 96-pin). They allow an easy integration into compact designs and a seamless drop-in migration from other u-blox cellular module families.
SARA-R5 series - System integration manual The modules support multi-band data communication over an extended operating temperature range of –40 to +85 °C, with extremely low power consumption, and with coverage enhancement for deeper range into buildings and basements (and underground with NB2).
SARA-R5 series - System integration manual 1.2 Architecture Figure 1, Figure 2 and Figure 3 summarize the internal architecture of the SARA-R500S modules, the one of the SARA-R510S modules, and the one of the SARA-R510M8S modules respectively.
SARA-R5 series - System integration manual UBX-R5 Cellular chipset Switch PA Filter TCXO ANT RF transceiver Filter 26 MHz SIM ANT_GNSS SAW LNA UBX-M8 UART GNSS chipset USB DDC (I2C) Flash memory Base Band processor SPI SDIO I2S Secure element (eSIM) GPIOs Reset ANT_DET VCC (supply) V_INT (I/O) Power-on Power Management Unit 32 kHz Figure 3: SARA-R510M8S block diagram ☞ The “00” product version of the SARA-R5 series modules do not support the following interfaces, which should be
SARA-R5 series - System integration manual Base-Band and Power Management section The Base-Band and Power Management section, based on the u-blox UBX-R5 cellular chipset, is composed of the following main elements: On-chip modem processor, vector signal processor, with dedicated hardware assistance for signal processing and system timing On-chip modem processor, with interfaces control functions On-chip voltage regulators to derive all the internal or external (V_SIM, V_INT) supply voltages
SARA-R5 series - System integration manual 1.3 Pin-out Table 3 lists the pin-out of the SARA-R5 series modules, with pins grouped by function. Function Pin Name Pin No Power VCC 51, 52, 53 I GND 1, 3, 5, 14, N/A Ground 20-22, 30, 32, 43, 50, 54, 55, 57-61, 63-96 V_INT 4 O Generic digital interfaces supply output V_INT = 1.8 V (typical) generated by internal regulator when the module is switched on, outside the low power PSM deep-sleep mode. See section 1.5.2 for functional description.
SARA-R5 series - System integration manual Function Pin Name Pin No I/O Description UART RXD 13 O UART data output USIO variants 0 / 1 / 2 / 3 / 4: Primary UART circuit 104 (RxD) in ITU-T V.24, for AT, data, Mux, FOAT, FW update via u-blox EasyFlash tool. See section 1.9.1 for functional description. See section 2.6.1 for external circuit design-in. TXD 12 I UART data input USIO variants 0 / 1 / 2 / 3 / 4: Primary UART circuit 103 (TxD) in ITU-T V.
SARA-R5 series - System integration manual Function Pin Name Pin No I/O Description Remarks USB VUSB_DET 17 I USB detect input VBUS USB supply generated by the host must be connected to this input pin to enable the USB interface. See section 1.9.2 for functional description. See section 2.6.2 for external circuit design-in. Provide test point for diagnostic purposes. USB_D- 28 I/O USB Data Line D- USB interface for diagnostics. 90 nominal differential impedance.
SARA-R5 series - System integration manual Function Pin Name Pin No I/O Description Remarks Audio I2S_TXD 35 O I2S transmit data I2S transmit data. Not supported by “00” product version. Alternatively configurable by +UGPIOC AT command. I2S_RXD 37 I I2S receive data I2S receive data. Not supported by “00” product version. I2S_CLK 36 I/O I2S clock I2S clock. Not supported by “00” product version. I2S_WA 34 I/O I2S word alignment I2S word alignment.
SARA-R5 series - System integration manual 1.4 Operating modes SARA-R5 series modules have several operating modes as defined in Table 4. General Status Operating Mode Power-down Not-powered mode VCC supply not present or below operating range: module is switched off. Power-off mode Normal operation Deep-sleep mode Definition VCC supply within operating range and module is switched off. RTC runs with 32 kHz reference internally generated.
SARA-R5 series - System integration manual The initial operating mode of SARA-R5 series modules is the one with VCC supply not present or below the operating range: the modules are switched off in not-powered mode. Once a valid VCC supply is applied to the SARA-R500S and the SARA-R510M8S modules, this event triggers the switch on routine of the modules that subsequently enter the active mode. Instead, once a valid VCC supply is applied to the SARA-R510S modules, they remain switched off in power-off mode.
SARA-R5 series - System integration manual 1.5 Supply interfaces 1.5.1 Module supply input (VCC) The modules must be supplied via the three VCC pins that represent the module power supply input. Voltage must be stable, because during operation, the current drawn by the SARA-R5 series modules through the VCC pins may vary significantly, depending on the operating mode and state (as described in sections 1.5.1.2, 1.5.1.3, 1.5.1.4 and 1.5.1.5).
SARA-R5 series - System integration manual Item Requirement Remark VCC current Support with adequate margin the highest averaged VCC current consumption value during Tx conditions specified in the SARA-R5 series data sheet [1] The maximum average current consumption can be greater than the specified value according to the actual antenna mismatching, temperature and supply voltage. Section 1.5.1.2 describes current consumption profiles in connected mode.
SARA-R5 series - System integration manual 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled) The low power mode configuration is by default disabled, but it can be enabled using the +UPSV AT command (see the SARA-R5 series AT commands manual [2]).
SARA-R5 series - System integration manual 1.5.2 Generic digital interfaces supply output (V_INT) The same voltage domain internally used as supply for the generic digital interfaces of SARA-R5 series modules is also available on the V_INT output pin, as illustrated in Figure 9. The internal regulator that generates the V_INT supply output is a switching (DC-DC) converter, which is directly supplied from the VCC main supply input of the module.
SARA-R5 series - System integration manual 1.6 System function interfaces 1.6.1 Module power-on 1.6.1.1 Switch-on events When the SARA-R500S and SARA-R510M8S modules are in the not-powered mode (i.e. switched off, with the VCC module supply not applied), the switch on routine can be triggered by: Applying a voltage at the VCC module supply input within the operating range (see SARA-R5 series data sheet [1]). When the SARA-R510S modules are in the not-powered mode (i.e.
SARA-R5 series - System integration manual 1.6.1.2 Switch-on sequence from not-powered mode Figure 11 shows the SARA-R500S / SARA-R510M8S switch-on sequence from the not-powered mode: The external power supply is applied to the VCC module pins, representing the start-up event. All the generic digital pins are tri-stated until the switch-on of their supply source (V_INT). The internal reset signal is held low: the baseband core and all digital pins are held in reset state.
SARA-R5 series - System integration manual 1.6.1.3 Switch-on / wake-up sequence from power-off / deep-sleep mode Figure 13 shows the SARA-R5 series modules switch-on or wake-up sequence from the power-off or deep-sleep mode: The external power supply is still applied to the VCC module pins, with the module being previously switched off (by means of the +CPWROFF AT command or by proper PWR_ON pin toggling), or with the module being previously entered deep-sleep mode.
SARA-R5 series - System integration manual 1.6.2 Module power-off 1.6.2.1 Switch-off events SARA-R5 series modules can be gracefully switched off, triggering the storage of the current parameter settings in the non-volatile memory of the module and performing a clean network detach procedure, by: +CPWROFF AT command (see SARA-R5 series AT commands manual [2]).
SARA-R5 series - System integration manual 1.6.2.3 Switch-off sequence by PWR_ON input pin Figure 15 describes the switch-off sequence of the modules started by the PWR_ON input pin, allowing storage of parameter settings in the non-volatile memory and a clean network detach: When a low pulse with appropriate time duration is applied at the PWR_ON input pin (see the SARA-R5 series data sheet [1]), the module starts the switch-off routine.
SARA-R5 series - System integration manual 1.6.3 Module reset SARA-R5 series modules can be gracefully reset (re-booted), triggering the storage of the current parameter settings in the non-volatile memory of the module and performing a clean network detach procedure, by: +CFUN AT command (see SARA-R5 series AT commands manual [2]).
SARA-R5 series - System integration manual 1.7 Antenna interfaces 1.7.1 Cellular antenna RF interface (ANT) SARA-R5 series modules provide an RF interface for connecting the external cellular antenna. The ANT pin represents the RF input/output for transmission and reception of LTE RF signals. The ANT pin has a nominal characteristic impedance of 50 and must be connected to the Tx / Rx cellular antenna through a 50 transmission line to allow proper RF transmission and reception. 1.7.1.
SARA-R5 series - System integration manual 1.7.2 ☞ GNSS antenna RF interface (ANT_GNSS) The GNSS antenna RF interface is not supported by SARA-R500S and SARA-R510S modules. SARA-R510M8S modules provide an RF interface for connecting the external GNSS antenna. The ANT_GNSS pin represents the RF input reception of GNSS RF signals. The ANT_GNSS pin has a nominal characteristic impedance of 50 and must be connected to the Rx GNSS antenna through a 50 transmission line to allow proper RF reception.
SARA-R5 series - System integration manual 1.7.3 Cellular antenna detection interface (ANT_DET) The antenna detection is based on ADC measurement. The ANT_DET pin is an analog to digital converter (ADC) provided to sense the antenna presence. The antenna detection function provided by ANT_DET pin is an optional feature that can be implemented if the application requires it. The antenna detection is forced by the +UANTR AT command.
SARA-R5 series - System integration manual Jamming signals come from in-band and out-band frequency sources. In-band jamming is caused by signals with frequencies within or close to the GNSS constellation frequency used, while out-band jamming is caused by very strong signals with frequencies different from the GNSS carrier, that is picked up at the input of the GNSS receiver and that can saturate the receiver front-end.
SARA-R5 series - System integration manual 1.8 SIM interface 1.8.1 SIM card interface SARA-R5 series modules provide on the VSIM, SIM_IO, SIM_CLK and SIM_RST pins a high-speed SIM/ME interface including automatic detection and configuration of the voltage required by the connected SIM card or chip. Both 1.8 V and 3 V SIM types are supported. Activation and deactivation with automatic voltage switch from 1.8 V to 3 V are implemented, according to ISO-IEC 7816-3 specifications.
SARA-R5 series - System integration manual 1.9.1 UART interfaces 1.9.1.1 UART features SARA-R5 series modules include 1.8 V unbalanced asynchronous serial interfaces (UART) for communications with external host application processor.
SARA-R5 series - System integration manual The following lines are provided: data lines (DCD as data output, DTR as data input) hardware flow control lines (RI as flow control output, DSR as flow control input) o o Ring indication function over the GPIO pin configured for this purpose (see section 1.11) DTR function, to control low power idle mode in case of +UPSV: 3 setting, over the GPIO pin configured for this purpose (see section 1.
SARA-R5 series - System integration manual 1.9.1.2 UART signals behavior At the end of the module boot sequence (see Figure 11, Figure 12, Figure 13), the module is by default in active mode, and the UART interface is initialized and enabled as AT commands interface.
SARA-R5 series - System integration manual 1.9.3 ☞ SPI interfaces The SPI interface are not supported by the “00” product version of SARA-R5 series modules, except for diagnostic purpose. SARA-R5 series modules include 1.8 V Serial Peripheral Interfaces available for communications with external SPI slave devices, or for diagnostic purpose with the module acting as SPI master. 1.9.4 ☞ SDIO interface The SDIO interface is not supported by the “00” product version of SARA-R5 series modules.
SARA-R5 series - System integration manual 1.11 General purpose input / output (GPIO) SARA-R5 series modules include pins which can be configured as General Purpose Input/Output or to provide custom functions via u-blox AT commands (for more details see the SARA-R5 series AT commands manual [2], +UGPIOC, +UGPIOR, +UGPIOW AT commands), as summarized in Table 8.
SARA-R5 series - System integration manual 2 Design-in 2.1 Overview For an optimal integration of the SARA-R5 series modules in the final application board, follow the design guidelines stated in this section. Every application circuit must be suitably designed to guarantee the correct functionality of the relative interface, but a number of points require particular attention during the design of the application device.
SARA-R5 series - System integration manual 2.2 Supply interfaces 2.2.1 Module supply (VCC) 2.2.1.1 General guidelines for VCC supply circuit selection and design All the available VCC pins have to be connected to the external supply minimizing the power loss due to series resistance. GND pins are internally connected.
SARA-R5 series - System integration manual Keep in mind that the use of rechargeable batteries requires the implementation of a suitable charger circuit, which is not included in the modules. The charger circuit needs to be designed to prevent over-voltage on VCC pins, and it should be selected according to the application requirements. A DC-DC switching charger is the typical choice when the charging source has a high nominal voltage (e.g.
SARA-R5 series - System integration manual SARA-R5 series 12V 2 9 C1 C2 3V8 VCC EN 8 PG VSW U1 BST 51 1 10 C3 D1 FB 5 PGND GND 4 11 VCC 52 VCC 53 VCC L1 R1 C6 C4 C7 C8 C9 C5 GND R2 Figure 20: Example of VCC supply circuit for SARA-R5 series modules, using a step-down regulator Reference Description Part number - Manufacturer C1 10 F capacitor ceramic X7R 50 V Generic manufacturer C2 10 nF capacitor ceramic X7R 16 V Generic manufacturer C3 22 nF capacitor ceramic X7R 1
SARA-R5 series - System integration manual Figure 21 and the components listed in Table 10 show an example of a power supply circuit for SARA-R5 series modules, where the module VCC is supplied by an LDO linear regulator capable of delivering maximum peak / pulse current specified for LTE use-case, with suitable power handling capability. It is recommended to configure the LDO linear regulator to generate a voltage supply value slightly below the maximum limit of the module VCC normal operating range (e.g.
SARA-R5 series - System integration manual 2.2.1.
SARA-R5 series - System integration manual Reference Description Part number - Manufacturer B1 Li-Ion (or Li-Pol) battery pack with 470 NTC Generic manufacturer C1, C2 1 F capacitor ceramic X7R 16 V Generic manufacturer C3 15 pF capacitor ceramic C0G 0402 5% 50 V GRM1555C1H150JB01 - Murata C4 68 pF capacitor ceramic C0G 0402 5% 50 V GRM1555C1H680JA16 - Murata C5 10 nF capacitor ceramic X7R 0402 10% 16 V GRT155R71C103KE01 - Murata C6 100 nF capacitor ceramic X7R 0402 10% 16 V GCM155R7
SARA-R5 series - System integration manual Figure 24 and the parts listed in Table 12 provide an application circuit example where the MPS MP2617H switching charger / regulator with integrated power path management function provides the supply to the cellular module.
SARA-R5 series - System integration manual Li-Ion/Li-Pol battery charger / regulator with power path managment BST 12V Primary source VIN C4 D3 R4 VLIM SYSFB R7 R1 R2 ENn BAT ILIM NTC ISET VCC TMR C2 51 VCC 52 VCC 53 VCC SYS R5 C1 SARA-R5 series L1 SW AGND PGND R6 C5 Li-Ion/Li-Pol battery pack C10 C11 C12 C13 θ R3 C3 C6 C7 C8 D1 D2 GND B1 U1 Figure 24: Li-Ion (or Li-Pol) battery charging and power path management application circuit Reference Description Part number - Ma
SARA-R5 series - System integration manual 2.2.1.8 Guidelines for removing VCC supply Removing the VCC power can be useful to minimize the current consumption when the SARA-R5 series modules are switched off. The application processor can disconnect the VCC supply source from the module and zero out the module’s current.
SARA-R5 series - System integration manual 2.2.1.9 Additional guidelines for VCC supply circuit design To reduce voltage drops, use a low impedance power source. The series resistance of the supply lines (connected to the modules’ VCC and GND pins) on the application board and battery pack should also be considered and minimized: cabling and routing must be as short as possible to minimize losses. Three pins are allocated to VCC supply connection. Several pins are designated for GND connection.
SARA-R5 series - System integration manual ☞ ESD sensitivity rating of the VCC supply pins is 1 kV (HBM according to JESD22-A114). Higher protection level can be required if the line is externally accessible on the application board, e.g. if accessible battery connector is directly connected to the supply pins. Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor) close to accessible point. 2.2.1.
SARA-R5 series - System integration manual 2.2.1.11 Guidelines for grounding layout design Good connection of the module GND pins with application PCB solid ground layer is required for correct RF performance. It significantly reduces EMC issues and provides a thermal heat sink for the module. Connect each GND pin with application board solid GND layer.
SARA-R5 series - System integration manual 2.3 System functions interfaces 2.3.1 Module power-on (PWR_ON) 2.3.1.1 Guidelines for PWR_ON circuit design SARA-R5 series PWR_ON input is equipped with an internal active pull-up resistor; an external pull-up resistor is not required and should not be provided. If connecting the PWR_ON input to a push button, the pin will be externally accessible on the application device.
SARA-R5 series - System integration manual 2.3.2 Module reset (RESET_N) 2.3.2.1 Guidelines for RESET_N circuit design SARA-R5 series RESET_N is equipped with an internal active pull-up; an external pull-up resistor is not required and should not be provided. If connecting the RESET_N input to a push button, the pin will be externally accessible on the application device. According to EMC/ESD requirements of the application, an additional ESD protection device (e.g.
SARA-R5 series - System integration manual 2.4 Antenna interfaces SARA-R5 series modules provide a cellular RF interface for connecting the external cellular antenna: the ANT pin represents the cellular RF input/output for cellular signals transmission and reception. SARA-R510M8S modules provide also a GNSS RF interface for connecting the external GNSS antenna: the ANT_GNSS pin represents the GNSS RF input for GNSS signals reception.
SARA-R5 series - System integration manual 2.4.1.2 ☞ Guidelines for RF transmission lines design The GNSS antenna RF interface is not supported by SARA-R500S and SARA-R510S modules. Any RF transmission line, such as the ones from the ANT and ANT_GNSS pads up to the related antenna connector or up to the related internal antenna pad, must be designed so that the characteristic impedance is as close as possible to 50 .
SARA-R5 series - System integration manual If the distance between the transmission line and the adjacent GND area (on the same layer) does not exceed 5 times the width of the line, use the “Coplanar Waveguide” model for the 50 calculation.
SARA-R5 series - System integration manual 2.4.1.3 ☞ Guidelines for RF termination design The GNSS antenna RF interface is not supported by SARA-R500S and SARA-R510S modules. The RF termination must provide a characteristic impedance of 50 as well as the RF transmission line up to the RF termination, to match the characteristic impedance of ANT and ANT_GNSS ports. However, real antennas do not have a perfect 50 load on all the supported frequency bands.
SARA-R5 series - System integration manual ☞ Place the antenna far from sensitive analog systems or employ countermeasures to reduce EMC or EMI issues. Be aware of interaction between co-located RF systems since the LTE transmitted power may interact or disturb the performance of companion systems (see also section 1.7.4). Refer to section 2.4.2.
SARA-R5 series - System integration manual o Further to the custom PCB and product restrictions, antennas may require tuning to obtain the required performance for compliance with all the applicable required certification schemes. It is recommended to consult the antenna manufacturer for the design-in guidelines for antenna matching relative to the custom application.
SARA-R5 series - System integration manual Table 18 lists some examples of possible internal off-board PCB-type cellular antennas with cable and connector. Manufacturer Part number Product name Description PulseLarsen Antennas W3929B0100 Taoglas FXUB64.18.0150A Taoglas FXUB63.07.0150C Laird Tech. EFF692SA3S Revie Flex Flexible LTE antenna 689..875 MHz, 1710..2500 MHz 90.0 x 20.0 mm Antenova SRFL026 Mitis GSM / WCDMA / LTE antenna on flexible PCB with cable and U.FL 689..960 MHz, 1710..
SARA-R5 series - System integration manual 2.4.2.3 Antenna trace design used for SARA-R5 series modules’ type approvals The conformity assessment of u-blox SARA-R5 series LGA surface-mounted modules for regulatory type approvals such as FCC United States, ISED Canada, RED Europe, etc.
SARA-R5 series - System integration manual The u-blox host printed circuit board has a structure of 4 Copper layers with 35 m thickness (1 oz/ft2) each, using FR4 dielectric substrate material with 4.3 typical permittivity at 1 GHz, and 0.013 typical loss tangent at 1 GHz.
SARA-R5 series - System integration manual After the antenna detection circuit with the layout illustrated on the left side of Figure 37, the antenna RF trace is designed as a 50 grounded coplanar waveguide on the bottom layer of the u-blox host printed circuit board, with total length ~29 mm, with layout and thickness, width, gap (signal to ground) characteristics illustrated in Figure 38.
SARA-R5 series - System integration manual 2.4.3 GNSS antenna RF interface (ANT_GNSS) ☞ The GNSS antenna RF interface is not supported by SARA-R500S and SARA-R510S modules. The antenna and its placement are critical system factors for accurate GNSS reception. Use of a ground plane will minimize the effects of ground reflections and enhance the antenna efficiency. A ground plane with a minimum diameter of 10 centimeter is recommended. Exercise care with rover vehicles that emit RF energy from motors etc.
SARA-R5 series - System integration manual The external LNA can be selected to deliver the performance needed by the application in terms of: Noise figure (sensitivity) Selectivity and linearity (robustness against jamming) Robustness against RF power Depending on the characteristics of the supply source (DC/DC regulator, linear LDO regulator or other) used to supply the external LNA, make sure some good filtering is in place for the external LNA supply because of the noise on the external LNA suppl
SARA-R5 series - System integration manual 2.4.3.2 Guidelines for applications with an active antenna Active antennas for GNSS applications are usually powered through a DC bias on the RF cable. A simple bias-T, as shown in Figure 42, can be used to add this DC current to the RF signal line. The inductance L is responsible for isolating the RF path from the DC path, while Rbias and C form a low pass filter to remove high frequency noise from the DC supply.
SARA-R5 series - System integration manual 2.4.4 Cellular antenna detection interface (ANT_DET) 2.4.4.1 Guidelines for ANT_DET circuit design Figure 43 and Table 23 describe the recommended schematic / components for the cellular antenna detection circuit to be provided on the application board and for the diagnostic circuit that must be provided on the antenna’s assembly to achieve antenna detection functionality.
SARA-R5 series - System integration manual The DC impedance at RF port for some antennas may be a DC open (e.g. linear monopole) or a DC short to reference GND (e.g. PIFA antenna).
SARA-R5 series - System integration manual 2.4.4.
SARA-R5 series - System integration manual Figure 45 shows the example application circuits implementing impedance tuning and aperture tuning. The module controls an RF switch which is responsible for selecting the appropriate matching element for the operating band. Table 25 reports suggested components implementing the SP4T RF switch functionality.
SARA-R5 series - System integration manual 2.5 SIM interface 2.5.1 Guidelines for SIM circuit design 2.5.1.
SARA-R5 series - System integration manual 2.5.1.2 Guidelines for single SIM card connection without detection A removable SIM card placed in a SIM card holder must be connected to the SIM card interface of SARA-R5 series modules as described in Figure 46, where the optional SIM detection feature is not implemented. Follow these guidelines to connect the module to a SIM connector without SIM presence detection: Connect the UICC / SIM contact C1 (VCC) to the VSIM pin of the module.
SARA-R5 series - System integration manual 2.5.1.3 Guidelines for single SIM chip connection A Surface-Mounted SIM chip (M2M UICC form factor) must be connected to the SIM card interface of the SARA-R5 series modules as described in Figure 47. Follow these guidelines to connect the module to a Surface-Mounted SIM chip without SIM presence detection: Connect the UICC / SIM contact C1 (VCC) to the VSIM pin of the module. Connect the UICC / SIM contact C7 (I/O) to the SIM_IO pin of the module.
SARA-R5 series - System integration manual Connect one pin of the normally-open mechanical switch integrated in the SIM connector (as the SW2 pin in Figure 48) to the GPIO5 input pin, providing a weak pull-down resistor (e.g. 470 k, as R2 in Figure 48). Connect the other pin of the normally-open mechanical switch integrated in the SIM connector (SW1 pin in Figure 48) to V_INT 1.8 V supply output by means of a strong pull-up resistor (e.g. 1 k, as R1 in Figure 48) Provide a 100 nF bypass capacitor (e.g.
SARA-R5 series - System integration manual 2.5.2 Guidelines for SIM layout design The layout of the SIM card interface lines (VSIM, SIM_CLK, SIM_IO, SIM_RST) may be critical if the SIM card is placed far away from the SARA-R5 series modules or in close proximity to the cellular antenna (and/or GNSS antenna, for SARA-R510M8S modules): these two cases should be avoided or at least mitigated as described below.
SARA-R5 series - System integration manual 2.6 Data communication interfaces 2.6.1 UART interfaces 2.6.1.1 Guidelines for UART circuit design Providing 1 UART with the full RS-232 functionality (using the complete V.24 link) ☞ Compatible with USIO variant 1; not compatible with USIO variants 0 / 2 / 3 / 4 (see section 1.9.1.1). If RS-232 compatible signal levels are needed, two different external voltage translators (e.g. Maxim MAX3237E and Texas Instruments SN74AVC4T774) can be used.
SARA-R5 series - System integration manual Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only ☞ Compatible with USIO variants 0/1; not compatible with USIO variants 2/3/4 (see section 1.9.1.1). If the functionality of the DSR and DCD lines is not required, or the lines are not available: Leave DSR and DCD lines of the module unconnected and floating If RS-232 compatible signal levels are needed, two different external voltage translators (e.g.
SARA-R5 series - System integration manual Providing 1 UART with the TXD, RXD, RTS and CTS lines only ☞ Compatible with USIO variants 0/1/3; not compatible with USIO variants 2/4 (see section 1.9.1.1).
SARA-R5 series - System integration manual Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only ☞ Compatible with USIO variants 2/3/4; not compatible with USIO variants 0/1 (see section 1.9.1.1). If RS-232 compatible signal levels are needed, two Maxim MAX13234E voltage level translators can be used. These chip translates voltage levels from 1.8 V (module side) to the RS-232 standard. If a 1.8 V application processor is used, the circuit should be implemented as described in Figure 55.
SARA-R5 series - System integration manual Providing 1 UART with the TXD and RXD lines only ☞ Compatible with USIO variants 0/1/3; not compatible with USIO variants 2/4 (see section 1.9.1.1).
SARA-R5 series - System integration manual Providing 2 UARTs with the TXD and RXD lines only ☞ Compatible with USIO variants 2/3/4; not compatible with USIO variants 0/1 (see section 1.9.1.1).
SARA-R5 series - System integration manual Additional considerations If a 3.0 V application processor (DTE) is used, the voltage scaling from any 3.0 V output of the DTE to the corresponding 1.8 V input of the module (DCE) can be implemented as an alternative low-cost solution, by means of an appropriate voltage divider. Consider the value of the pull-down / pull-up integrated at the input of the module (DCE) for the correct selection of the voltage divider resistance values.
SARA-R5 series - System integration manual 2.6.2 USB interface ☞ The USB interface is available for diagnostic purpose only. 2.6.2.1 Guidelines for USB circuit design A suitable application circuit can be similar to the one illustrated in Figure 61, where direct external access is provided for diagnostic purpose by means of testpoints made available on the application board for VUSB_DET, USB_D+ and USB_D- lines.
SARA-R5 series - System integration manual Figure 62 and Figure 63 provide two examples of coplanar waveguide designs with differential characteristic impedance close to 90 and common mode characteristic impedance close to 30 . The first transmission line can be implemented in case of 4-layer PCB stack-up herein described, the second transmission line can be implemented in case of 2-layer PCB stack-up herein described.
SARA-R5 series - System integration manual 2.6.5 DDC (I2C) interface 2.6.5.1 ☞ Guidelines for DDC (I2C) circuit design Communication with an external GNSS receiver is not supported by SARA-R510M8S modules. The DDC I2C-bus master interface can be used to communicate with u-blox GNSS receivers and other external I2C-bus slaves as an audio codec. The SDA and SCL pins of the module are open drain output as per I2C bus specifications [9], and they have internal pull-up resistors to the V_INT 1.
SARA-R5 series - System integration manual Connection with u-blox 3.0 V GNSS receivers ☞ Communication with an external GNSS receiver is not supported by SARA-R510M8S modules. Figure 65 shows an application circuit for connecting the cellular module to a u-blox 3.0 V GNSS receiver: As the SDA and SCL pins of the cellular module are not tolerant up to 3.0 V, the connection to the related I2C pins of the u-blox 3.
SARA-R5 series - System integration manual 2.6.5.2 Guidelines for DDC (I2C) layout design The DDC (I2C) serial interface requires the same consideration regarding electro-magnetic interference as any other digital interface. Keep the traces short and avoid coupling with RF line or sensitive analog inputs, since the signals can cause the radiation of some harmonics of the digital data frequency. 2.7 ☞ Audio Audio is not supported by the “00” product version of SARA-R5 series modules. 2.
SARA-R5 series - System integration manual ☞ Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k resistor on the board in series to the GPIO of SARA-R5 series modules. ☞ Do not apply voltage to any GPIO of the module before the switch-on of the GPIOs supply (V_INT), to avoid latch-up of circuits and allow a clean module boot. If the external signals connected to the module cannot be tri-stated or set low, insert a multi-channel digital switch (e.g.
SARA-R5 series - System integration manual 2.11 Module footprint and paste mask Figure 67 and Table 38 describe the suggested footprint (i.e. copper mask) and paste mask layout for SARA modules: the proposed land pattern layout reflects the modules’ pins layout, while the proposed stencil apertures layout is slightly different (see the F’’, H’’, I’’, J’’, O’’ parameters compared to the F’, H’, I’, J’, O’ ones).
SARA-R5 series - System integration manual 2.12 Schematic for SARA-R5 series module integration Figure 68 is an example of a schematic diagram where a SARA-R5 series product is integrated into an application board using most of the available interfaces and functions of the module.
SARA-R5 series - System integration manual 2.13 Design-in checklist This section provides a design-in checklist. 2.13.1 Schematic checklist The following are the most important points for a simple schematic check: DC supply must provide a nominal voltage at VCC pin within the operating range limits.
SARA-R5 series - System integration manual 2.13.2 Layout checklist The following are the most important points for a simple layout check: Check 50 nominal characteristic impedance of the RF transmission line connected to the ANT port (cellular antenna RF interface). Check cellular antenna trace design for regulatory compliance perspective (see section 4.2.3 for FCC United States, section 4.3.2 for ISED Canada, and related section 2.4.2.
SARA-R5 series - System integration manual 3 ☞ Handling and soldering No natural rubbers, no hygroscopic materials or materials containing asbestos are employed. 3.1 Packaging, shipping, storage and moisture preconditioning For information pertaining to SARA-R5 series reels / tapes, Moisture Sensitivity levels (MSD), shipment and storage information, as well as drying for preconditioning, see the SARA-R5 series data sheet [1] and the u-blox package information user guide [15]. 3.
SARA-R5 series - System integration manual 3.3 Soldering 3.3.1 Soldering paste "No Clean" soldering paste is strongly recommended for SARA-R5 series modules, as it does not require cleaning after the soldering process has taken place. The paste listed in the example below meets these criteria. Soldering paste: Alloy specification: Melting temperature: Stencil thickness: OM338 SAC405 / Nr.143714 (Cookson Electronics) 95.5% Sn / 3.9% Ag / 0.6% Cu (95.5% tin / 3.9% silver / 0.6% copper) 95.5% Sn / 4.
SARA-R5 series - System integration manual Cooling phase A controlled cooling avoids negative metallurgical effects of the solder (solder becomes more brittle) and possible mechanical tensions in the products. Controlled cooling helps to achieve bright solder fillets with a good shape and low contact angle. Temperature fall rate: max 4 °C/s ☞ To avoid falling off, modules should be placed on the topside of the motherboard during soldering.
SARA-R5 series - System integration manual 3.3.5 Repeated reflow soldering Repeated reflow soldering processes and soldering the module upside-down are not recommended. Boards with components on both sides may require two reflow cycles. In this case, the module should always be placed on the side of the board that is submitted into the last reflow cycle. The reason for this (besides others) is the risk of the module falling off due to the significantly higher weight in relation to other components.
SARA-R5 series - System integration manual 3.3.11 Grounding metal covers Attempts to improve grounding by soldering ground cables, wick or other forms of metal strips directly onto the EMI covers is done at the customer's own risk. The numerous ground pins should be sufficient to provide optimum immunity to interference and noise. ☞ u-blox gives no warranty for damages to the cellular modules caused by soldering metal cables or any other forms of metal strips directly onto the EMI covers. 3.3.
SARA-R5 series - System integration manual 4 Approvals 4.
SARA-R5 series - System integration manual The SARA-R5 series modules include the capability to configure the device by selecting the operating Mobile Network Operator Profile, Radio Access Technology, and bands. In the SARA-R5 series AT commands manual [2], see the +UMNOPROF, +URAT, and +UBANDMASK AT commands.
SARA-R5 series - System integration manual ⚠ The gain of the system antenna(s) used for the SARA-R5 series modules (i.e. the combined transmission line, connector, cable losses and radiating element gain) must not exceed the value specified in the FCC Grant for mobile and fixed or mobile operating configurations: o o o o o o o 7.8 dBi in 700 MHz, i.e. LTE FDD-12 band 9.2 dBi in 750 MHz, i.e. LTE FDD-13 band 9.4 dBi in 850 MHz, i.e. LTE FDD-5 band 7.4 dBi in 850 MHz, i.e. LTE FDD-26 band 6.
SARA-R5 series - System integration manual 4.3 Innovation, Science, Economic Development Canada notice ISED Canada (formerly known as IC - Industry Canada) Certification Number: 8595A-UBX19KM01 4.3.1 Declaration of Conformity This device complies with the ISED Canada license-exempt RSS standard(s).
SARA-R5 series - System integration manual ⚠ Innovation, Science and Economic Development Canada (ISED) Notices This Class B digital apparatus complies with Canadian CAN ICES-3(B) / NMB-3(B).
SARA-R5 series - System integration manual ⚠ IMPORTANT: les fabricants d'applications portables contenant les modules de la SARA-R5 series doivent faire certifier leur produit final et déposer directement leur candidature pour une certification FCC ainsi que pour un certificat ISDE Canada délivré par l'organisme chargé de ce type d'appareil portable. Ceci est obligatoire afin d'être en accord avec les exigences SAR pour les appareils portables.
SARA-R5 series - System integration manual 5 Product testing 5.1 u-blox in-series production test u-blox focuses on high quality for its products. All units produced are fully tested automatically on the production line. Stringent quality control processes have been implemented in the production line. Defective units are analyzed in detail to improve production quality. This is achieved with automatic test equipment (ATE) in the production line, which logs all production and measurement data.
SARA-R5 series - System integration manual 5.2 Test parameters for OEM manufacturers Because of the testing done by u-blox (with 100% coverage), an OEM manufacturer does not need to repeat the firmware tests or measurements of the module RF performance or tests over analog and digital interfaces in their production test.
SARA-R5 series - System integration manual 5.2.2 Cellular RF functional tests The overall cellular RF functional test of the device including the antenna can be performed with basic instruments such as a spectrum analyzer (or an RF power meter) and a signal generator with the assistance of the +UTEST AT command over the AT command user interface. The +UTEST AT command provides a simple interface to set the module to Rx or Tx test modes ignoring the LTE signaling protocol.
SARA-R5 series - System integration manual 5.2.3 GNSS RF functional tests The best way to test the GNSS RF functionality is with the use of a Multi-GNSS generator, as it assures reliable and constant signals at every measurement. u-blox recommends the following Multi-GNSS generator: Spirent GSS6300 Spirent Communications Positioning Technology www.positioningtechnology.co.uk Guidelines for GNSS RF functionality tests: 1. 2. 3. 4. 5. Connect a Multi-GNSS generator to the OEM product.
SARA-R5 series - System integration manual Appendix A Migration between SARA modules A.1 Overview The u-blox SARA form factor (26.0 x 16.
SARA-R5 series - System integration manual The SARA modules are also form-factor compatible with the u-blox LARA, LISA and TOBY cellular module families: although each has a different form factor, the footprints for the TOBY, LISA, LARA and SARA modules have been developed to ensure layout compatibility. With the u-blox “nested design” solution, any TOBY, LISA, LARA or SARA module can be alternatively mounted on the same space of a single “nested” application board as described in Figure 73.
SARA-R5 series - System integration manual Figure 74 summarizes the frequency ranges of the modules’ operating bands.
SARA-R5 series - System integration manual A.2 Pin-out comparison between SARA modules Table 41 shows a pin-out comparison between the SARA-R4, SARA-R5, SARA-N2, SARA-N3, SARA-G3, SARA-G4, and SARA-U2 modules.
SARA-R5 series - System integration manual No SARA-R41x SARA-R42x SARA-R5xx SARA-N2xx SARA-N3xx SARA-G3xx SARA-G4xx SARA-U2xx 9 DTR DTR DTR RSVD DTR DTR DTR DTR UART DTR input V_INT level (1.8 V) Internal pull-up: ~100 kΩ Set low for URCs/Greeting UART DTR input V_INT level (1.8 V) Internal pull-up: ~100 kΩ Set low for greeting text UART DTR input V_INT level (1.
SARA-R5 series - System integration manual No SARA-R41x SARA-R42x SARA-R5xx SARA-N2xx SARA-N3xx SARA-G3xx SARA-G4xx SARA-U2xx 16 GPIO1 GPIO1 GPIO1 GPIO1 GPIO1 GPIO1 GPIO1 GPIO1 GPIO V_INT level (1.8 V) Driver strength: 2 mA GPIO V_INT level (1.8 V) Driver strength: 2 mA GPIO V_INT level (1.8 V) Driver strength: 2 mA Trace data output V_INT level (1.8 V) Driver strength: 1 mA TestPoint recommended GPIO V_INT level (1.8 / 2.8 V) Driver strength: 3 mA GPIO V_INT level (1.
SARA-R5 series - System integration manual No SARA-R41x SARA-R42x SARA-R5xx SARA-N2xx SARA-N3xx SARA-G3xx SARA-G4xx SARA-U2xx 26 SDA SDA SDA SDA SDA SDA SDA SDA I2C data16 V_INT level (1.8 V) Open drain Internal pull-up: 2.2 kΩ I2C data V_INT level (1.8 V) Open drain Internal pull-up: 2.2 kΩ I2C data V_INT level (1.8 V) Open drain Internal active pull-up I2C data15 V_INT level (1.8 V) Open drain No internal pull-up I2C data14 V_INT level (1.8 / 2.
SARA-R5 series - System integration manual No SARA-R41x SARA-R42x SARA-R5xx SARA-N2xx SARA-N3xx SARA-G3xx SARA-G4xx SARA-U2xx 36 I2S_CLK / SPI_CLK I2S_CLK I2S_CLK RSVD RSVD I2S_CLK I2S_CLK I2S_CLK I2S clock19 / SPI clock19 V_INT level (1.8 V) Driver strength: 2 mA I2S clock20 V_INT level (1.8 V) Driver strength: 2 mA I2S clock20 V_INT level (1.8 V) Reserved Reserved I2S clock V_INT level (1.8 V) Driver strength: 5 mA I2S clock14 V_INT level (1.8 V / 3.
SARA-R5 series - System integration manual No SARA-R41x SARA-R42x SARA-R5xx SARA-N2xx SARA-N3xx SARA-G3xx SARA-G4xx SARA-U2xx 49 SDIO_D1 RSVD SDIO_D1 RSVD RSVD MIC_P MIC_P RSVD SDIO serial data [1]23 Reserved SDIO serial data [1]24 Configurable as SPI_MISO (diagnostic only) Reserved Reserved Analog audio input (+) Analog audio input (+)14 Reserved GND GND GND GND GND GND GND GND Ground Ground Ground Ground Ground Ground Ground Ground VCC VCC VCC VCC VCC VCC VC
SARA-R5 series - System integration manual A.3 Schematic for SARA modules integration Figure 75 shows an example of a simple schematic diagram where a SARA-N2, SARA-N3, SARA-R4, SARA-R5, SARA-G3, SARA-G4 and/or SARA-U2 module is integrated in the same application board, using the main available interfaces and functions of the modules.
SARA-R5 series - System integration manual The application processor controls the RESET_N / PWR_OFF line by means of open drain driver too.
SARA-R5 series - System integration manual SARA 15pF 0Ω or ferrite bead Supply source 3V6 + 51 VCC 52 VCC 56pF 15pF ANT_DET 62 GND 68nH 10k 27pF 0Ω Supply source 3V0 0Ω 0Ω Cellular antenna 39nH 53 VCC 330µF 100nF 10nF Connector 33pF ANT 56 ESD GND / ANT_BT 59 21 GND / VSEL 2 V_BCKP / USB_3V3 / RSVD RSVD / SDIO_D1 / MIC_P 49 TP Application processor RSVD / SDIO_D3 / MIC_N 48 RSVD / SDIO_D0 / MIC_GND 100k Supply source 2V8 0Ω TP GPIO 47 RSVD / SDIO_CMD / MIC_BIAS 46 15 PWR_ON /
SARA-R5 series - System integration manual B Glossary Abbreviation Definition 2G 2nd Generation Cellular Technology (GSM, GPRS, EGPRS) 3G 3rd Generation Cellular Technology (UMTS, HSDPA, HSUPA) 3GPP 3rd Generation Partnership Project ADC Analog to Digital Converter AR Axial Ratio AT AT Command Interpreter Software Subsystem, or attention BB Baseband BeiDou Chinese satellite navigation system BJT Bipolar Junction Transistor C/No Carrier to Noise ratio C2PC Class II Permissive Change
SARA-R5 series - System integration manual Abbreviation Definition Galileo European satellite navigation system GCF Global Certification Forum GLONASS GLObal NAvigation Satellite System (Russian satellite navigation system) GND Ground GNSS Global Navigation Satellite System GPIO General Purpose Input Output GPRS General Packet Radio Service GPS Global Positioning System GSM Global System for Mobile communication HBM Human Body Model HDLC High-level Data Link Control HSPA High-Speed
SARA-R5 series - System integration manual Abbreviation Definition PSM Power Saving Mode PTCRB PCS Type Certification Review Board PWM Pulse Width Modulation QZSS Quasi-Zenith Satellite System RAT Radio Access Technology RF Radio Frequency RI Ring Indicator RSSI Received Signal Strength Indication RSVD Reserved RTC Real Time Clock RTS Request To Send Rx Receiver SAW Surface Acoustic Wave SBAS Satellite-Based Augmentation System SDIO Secure Digital Input Output SIM Subscribe
SARA-R5 series - System integration manual Related documents [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] ☞ u-blox SARA-R5 series data sheet, doc. no. UBX-19016638 u-blox SARA-R5 series AT commands manual, doc. no. UBX-19047455 u-blox EVK-R5 user guide, doc. no. UBX-19042592 Universal Serial Bus revision 2.0 specification, https://www.usb.org/ ITU-T recommendation V.
SARA-R5 series - System integration manual Revision history Revision Date Name Comments R01 20-Dec-2019 fvid/psca/sses Initial release R02 10-Mar-2020 sses/fvid Extended document applicability to SARA-R500S-00B Updated SARA-R510S-00B and SARA-R510M8S-00B product status Added regulatory certification approval info GPIO, power-on, power-off, reset sections updated Other minor corrections and clarifications R03 26-Mar-2020 sses Revised regulatory certification approval info Added antenna trace
SARA-R5 series - System integration manual Contact For complete contact information, visit us at www.u-blox.com. u-blox Offices North, Central and South America u-blox America, Inc. Phone: E-mail: +1 703 483 3180 info_us@u-blox.com Regional Office West Coast: Phone: E-mail: +1 408 573 3640 info_us@u-blox.com Headquarters Europe, Middle East, Africa Asia, Australia, Pacific u-blox AG Phone: +65 6734 3811 E-mail: info_ap@u-blox.com Support: support_ap@u-blox.
