Integration Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC or 3.3Vaux)
- 1.5.1.1 VCC or 3.3Vaux supply requirements
- 1.5.1.2 VCC or 3.3Vaux current consumption in 2G connected-mode
- 1.5.1.3 VCC or 3.3Vaux current consumption in 3G connected mode
- 1.5.1.4 VCC or 3.3Vaux current consumption in LTE connected-mode
- 1.5.1.5 VCC or 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)
- 1.5.1.6 VCC or 3.3Vaux current consumption in fixed active-mode (power saving disabled)
- 1.5.2 RTC supply input/output (V_BCKP)
- 1.5.3 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC or 3.3Vaux)
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
- 1.13 Reserved pins (RSVD)
- 1.14 Not connected pins (NC)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Antenna supervisor
- 1.15.3 Jamming detection
- 1.15.4 IP modes of operation
- 1.15.5 Dual stack IPv4/IPv6
- 1.15.6 TCP/IP and UDP/IP
- 1.15.7 FTP
- 1.15.8 HTTP
- 1.15.9 SSL / TLS
- 1.15.10 Bearer Independent Protocol
- 1.15.11 Wi-Fi integration
- 1.15.12 Firmware update Over AT (FOAT)
- 1.15.13 Firmware update Over The Air (FOTA)
- 1.15.14 Smart temperature management
- 1.15.15 SIM Access Profile (SAP)
- 1.15.16 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC or 3.3Vaux)
- 2.2.1.1 General guidelines for VCC or 3.3Vaux supply circuit selection and design
- 2.2.1.2 Guidelines for VCC or 3.3Vaux supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC or 3.3Vaux supply circuit design using a Low Drop-Out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC or 3.3Vaux supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC or 3.3Vaux supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply output (V_BCKP)
- 2.2.3 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC or 3.3Vaux)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio interface
- 2.8 General Purpose Input/Output
- 2.9 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 TOBY-L2 series module footprint and paste mask
- 2.13 MPCI-L2 series module installation
- 2.14 Thermal guidelines
- 2.15 ESD guidelines
- 2.16 Schematic for TOBY-L2 and MPCI-L2 series module integration
- 2.17 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science and Economic Development Canada notice
- 4.4 Brazilian Anatel certification
- 4.5 European Conformance CE mark
- 4.6 Australian Regulatory Compliance Mark
- 4.7 Taiwanese NCC certification
- 4.8 Japanese Giteki certification
- 5 Product testing
- Appendix
- A Migration between TOBY-L1 and TOBY-L2
- B Glossary
- Related documents
- Revision history
- Contact
TOBY-L2 and MPCI-L2 series - System Integration Manual
UBX-13004618 - R26 Design-in
Page 77 of 162
2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
The characteristics of a primary (non-rechargeable) battery connected to VCC pins should meet the following
prerequisites to comply with the module VCC requirements summarized in Table 7:
Maximum pulse and DC discharge current: the non-rechargeable battery with its related output circuit
connected to the VCC pins must be capable of delivering a pulse current as the maximum peak current
consumption during Tx burst at maximum Tx power specified in TOBY-L2 series Data Sheet [1] and must be
capable of extensively delivering a DC current as the maximum average current consumption specified in
TOBY-L2 series Data Sheet [1]. The maximum discharge current is not always reported in battery data sheets,
but the maximum DC discharge current is typically almost equal to the battery capacity in Amp-hours divided
by 1 hour.
DC series resistance: the non-rechargeable battery with its output circuit must be capable of avoiding a VCC
voltage drop below the operating range summarized in Table 7 during transmit bursts.
2.2.1.6 Additional guidelines for VCC or 3.3Vaux supply circuit design
To reduce voltage drops, use a low impedance power source. The series resistance of the power supply lines
(connected to the modules’ VCC / 3.3Vaux and GND pins) on the application board and battery pack should also
be considered and minimized: cabling and routing must be as short as possible to minimize power losses.
Three pins are allocated to VCC supply and five pins to 3.3Vaux supply. Several pins are designated for GND
connection. Even if all the VCC / 3.3Vaux pins and all the GND pins are internally connected within the module,
it is recommended to properly connect all of them to supply the module to minimize series resistance losses.
To avoid voltage drop undershoot and overshoot at the start and end of a transmit burst during a GSM call (when
current consumption on the VCC or 3.3Vaux supply can rise up as specified in TOBY-L2 series Data Sheet [1] or
in MPCI-L2 series Data Sheet [2]), place a bypass capacitor with large capacitance (at least 100 µF) and low ESR
near the VCC pins, for example:
330 µF capacitance, 45 m ESR (e.g. KEMET T520D337M006ATE045, Tantalum Capacitor)
To reduce voltage ripple and noise, improving RF performance especially if the application device integrates an
internal antenna, place the following bypass capacitors near the VCC / 3.3Vaux pins:
68 pF capacitor with Self-Resonant Frequency in the 800/900 MHz range (e.g. Murata GRM1555C1H680J) to
filter EMI in the RF low frequencies bands
15 pF capacitor with Self-Resonant Frequency in 1800/1900 MHz range (e.g. Murata GRM1555C1E150J)
to filter EMI in the RF high frequencies bands
8.2 pF capacitor with Self-Resonant Frequency in 2500/2600 MHz range (e.g. Murata GRM1555C1H8R2D)
to filter EMI in the RF very high frequencies band
10 nF capacitor (e.g. Murata GRM155R71C103K) to filter digital logic noise from clocks and data sources
100 nF capacitor (e.g. Murata GRM155R61C104K) to filter digital logic noise from clocks and data sources
A suitable series ferrite bead can be properly placed on the VCC / 3.3Vaux line for additional noise filtering if
required by the specific application according to the whole application board design.
The necessity of each part depends on the specific design, but it is recommended to provide all the bypass
capacitors described in Figure 37 / Table 25 if the application device integrates an internal antenna.