Integration Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC or 3.3Vaux)
- 1.5.1.1 VCC or 3.3Vaux supply requirements
- 1.5.1.2 VCC or 3.3Vaux current consumption in 2G connected-mode
- 1.5.1.3 VCC or 3.3Vaux current consumption in 3G connected mode
- 1.5.1.4 VCC or 3.3Vaux current consumption in LTE connected-mode
- 1.5.1.5 VCC or 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)
- 1.5.1.6 VCC or 3.3Vaux current consumption in fixed active-mode (power saving disabled)
- 1.5.2 RTC supply input/output (V_BCKP)
- 1.5.3 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC or 3.3Vaux)
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
- 1.13 Reserved pins (RSVD)
- 1.14 Not connected pins (NC)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Antenna supervisor
- 1.15.3 Jamming detection
- 1.15.4 IP modes of operation
- 1.15.5 Dual stack IPv4/IPv6
- 1.15.6 TCP/IP and UDP/IP
- 1.15.7 FTP
- 1.15.8 HTTP
- 1.15.9 SSL / TLS
- 1.15.10 Bearer Independent Protocol
- 1.15.11 Wi-Fi integration
- 1.15.12 Firmware update Over AT (FOAT)
- 1.15.13 Firmware update Over The Air (FOTA)
- 1.15.14 Smart temperature management
- 1.15.15 SIM Access Profile (SAP)
- 1.15.16 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC or 3.3Vaux)
- 2.2.1.1 General guidelines for VCC or 3.3Vaux supply circuit selection and design
- 2.2.1.2 Guidelines for VCC or 3.3Vaux supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC or 3.3Vaux supply circuit design using a Low Drop-Out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC or 3.3Vaux supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC or 3.3Vaux supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply output (V_BCKP)
- 2.2.3 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC or 3.3Vaux)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio interface
- 2.8 General Purpose Input/Output
- 2.9 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 TOBY-L2 series module footprint and paste mask
- 2.13 MPCI-L2 series module installation
- 2.14 Thermal guidelines
- 2.15 ESD guidelines
- 2.16 Schematic for TOBY-L2 and MPCI-L2 series module integration
- 2.17 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science and Economic Development Canada notice
- 4.4 Brazilian Anatel certification
- 4.5 European Conformance CE mark
- 4.6 Australian Regulatory Compliance Mark
- 4.7 Taiwanese NCC certification
- 4.8 Japanese Giteki certification
- 5 Product testing
- Appendix
- A Migration between TOBY-L1 and TOBY-L2
- B Glossary
- Related documents
- Revision history
- Contact
TOBY-L2 and MPCI-L2 series - System Integration Manual
UBX-13004618 - R26 System description
Page 33 of 162
Figure 14 shows the module power-on sequence from the not-powered mode, describing the following phases:
The external supply is applied to the VCC or 3.3Vaux module supply inputs, representing the start-up event.
The PWR_ON and the RESET_N or PERST# pins suddenly rise to high logic level due to internal pull-ups.
The V_BCKP RTC supply output is suddenly enabled by the module as VCC reaches a valid voltage value.
All the generic digital pins of the module are tri-stated until the switch-on of their supply source (V_INT).
The internal reset signal is held low: the baseband core and all the digital pins are held in the reset state. The
reset state of all the digital pins is reported in the pin description table of TOBY-L2 Series Data Sheet [1].
When the internal reset signal is released, any digital pin is set in a proper sequence from the reset state to
the default operational configured state. The duration of this pins’ configuration phase differs within generic
digital interfaces and the USB interface due to host / device enumeration timings (see section 1.9.1).
The module is fully ready to operate after all interfaces are configured.
VCC or 3.3Vaux
V_BCKP
PWR_ON
RESET_N or PERST#
V_INT
Internal Reset
System State
BB Pads State
Internal Reset → Operational Operational
Tristate / Floating
Internal Reset
OFF
ON
0 ms
~10 ms
~20 s
Start of interface
configuration
Module interfaces
are configured
Start-up
event
~5 ms
Figure 14: TOBY-L2 and MPCI-L2 series power-on sequence description
The greeting text can be activated by means of +CSGT AT command (see u-blox AT Commands Manual [3]) to
notify the external application that the module is ready to operate (i.e. ready to reply to AT commands) and the
first AT command can be sent to the module, given that autobauding has to be disabled on the UART to let the
module sending the greeting text: the UART has to be configured at fixed baud rate (the baud rate of the
application processor) instead of the default autobauding, otherwise the module does not know the baud rate to
be used for sending the greeting text (or any other URC) at the end of the internal boot sequence.
The Internal Reset signal is not available on a module pin, but the host application can monitor:
The V_INT pin to sense the start of the TOBY-L2 module power-on sequence.
The USB interface to sense the start of the MPCI-L2 module power-on sequence: the module, as USB
device, informs the host of the attach event via a reply on its status change pipe for proper bus
enumeration process according to Universal Serial Bus Revision 2.0 specification [7].
Before the switch-on of the generic digital interface supply source (V_INT) of the module, no voltage driven
by an external application should be applied to any generic digital interface of TOBY-L2 module.
Before the TOBY-L2 and MPCI-L2 series module is fully ready to operate, the host application processor
should not send any AT command over the AT communication interfaces (USB, UART) of the module.
The duration of the TOBY-L2 and MPCI-L2 series modules’ switch-on routine can vary depending on the
application / network settings and the concurrent module activities.