Integration Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC or 3.3Vaux)
- 1.5.1.1 VCC or 3.3Vaux supply requirements
- 1.5.1.2 VCC or 3.3Vaux current consumption in 2G connected-mode
- 1.5.1.3 VCC or 3.3Vaux current consumption in 3G connected mode
- 1.5.1.4 VCC or 3.3Vaux current consumption in LTE connected-mode
- 1.5.1.5 VCC or 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)
- 1.5.1.6 VCC or 3.3Vaux current consumption in fixed active-mode (power saving disabled)
- 1.5.2 RTC supply input/output (V_BCKP)
- 1.5.3 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC or 3.3Vaux)
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
- 1.13 Reserved pins (RSVD)
- 1.14 Not connected pins (NC)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Antenna supervisor
- 1.15.3 Jamming detection
- 1.15.4 IP modes of operation
- 1.15.5 Dual stack IPv4/IPv6
- 1.15.6 TCP/IP and UDP/IP
- 1.15.7 FTP
- 1.15.8 HTTP
- 1.15.9 SSL / TLS
- 1.15.10 Bearer Independent Protocol
- 1.15.11 Wi-Fi integration
- 1.15.12 Firmware update Over AT (FOAT)
- 1.15.13 Firmware update Over The Air (FOTA)
- 1.15.14 Smart temperature management
- 1.15.15 SIM Access Profile (SAP)
- 1.15.16 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC or 3.3Vaux)
- 2.2.1.1 General guidelines for VCC or 3.3Vaux supply circuit selection and design
- 2.2.1.2 Guidelines for VCC or 3.3Vaux supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC or 3.3Vaux supply circuit design using a Low Drop-Out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC or 3.3Vaux supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC or 3.3Vaux supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply output (V_BCKP)
- 2.2.3 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC or 3.3Vaux)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio interface
- 2.8 General Purpose Input/Output
- 2.9 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 TOBY-L2 series module footprint and paste mask
- 2.13 MPCI-L2 series module installation
- 2.14 Thermal guidelines
- 2.15 ESD guidelines
- 2.16 Schematic for TOBY-L2 and MPCI-L2 series module integration
- 2.17 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science and Economic Development Canada notice
- 4.4 Brazilian Anatel certification
- 4.5 European Conformance CE mark
- 4.6 Australian Regulatory Compliance Mark
- 4.7 Taiwanese NCC certification
- 4.8 Japanese Giteki certification
- 5 Product testing
- Appendix
- A Migration between TOBY-L1 and TOBY-L2
- B Glossary
- Related documents
- Revision history
- Contact
TOBY-L2 and MPCI-L2 series - System Integration Manual
UBX-13004618 - R26 Design-in
Page 135 of 162
2.17.2 Layout checklist
The following are the most important points for a simple layout check:
Check 50 nominal characteristic impedance of the RF transmission line connected to the ANT1 and the
ANT2 ports (antenna RF interfaces).
Ensure no coupling occurs between the RF interface and noisy or sensitive signals (primarily analog audio
input/output signals, SIM signals, high-speed digital lines such as SDIO, USB and other data lines).
Optimize placement for minimum length of RF line.
Check the footprint and paste mask designed for TOBY-L2 module as illustrated in section 2.12.
VCC / 3.3Vaux line should be wide and as short as possible.
Route VCC / 3.3Vaux supply line away from RF lines / parts and other sensitive analog lines / parts.
The VCC / 3.3Vaux bypass capacitors in the picoFarad range should be placed as close as possible to the
VCC / 3.3Vaux pins, in particular if the application device integrates an internal antenna.
Ensure an optimal grounding connecting each GND pin with application board solid ground layer.
Use as many vias as possible to connect the ground planes on multilayer application board, providing a
dense line of vias at the edges of each ground area, in particular along RF and high speed lines.
Keep routing short and minimize parasitic capacitance on the SIM lines to preserve signal integrity.
USB_D+ / USB_D- traces should meet the characteristic impedance requirement (90 differential and
30 common mode) and should not be routed close to any RF line / part.
Keep the SDIO traces short, avoid stubs, avoid coupling with any RF line / part and consider low value
series damping resistors to avoid reflections and other losses in signal integrity.
Ensure appropriate RF precautions for the Wi-Fi and Cellular technologies coexistence as described in
section 2.6.4 and in the Wi-Fi / Cellular Integration Application Note [15].
Ensure appropriate RF precautions for the GNSS and Cellular technologies coexistence as described in the
GNSS Implementation Application Note [14].
Route analog audio signals away from noisy sources (primarily RF interface, VCC, switching supplies).
The audio outputs lines on the application board must be wide enough to minimize series resistance.
2.17.3 Antenna checklist
Antenna termination should provide 50 characteristic impedance with V.S.W.R at least less than 3:1
(recommended 2:1) on operating bands in deployment geographical area.
Follow the recommendations of the antenna producer for correct antenna installation and deployment
(PCB layout and matching circuitry).
Ensure compliance with any regulatory agency RF radiation requirement, as reported in sections 4.2.2
and/or 4.3.1 for products marked with the FCC and/or IC.
Ensure high and similar efficiency for both the primary (ANT1) and the secondary (ANT2) antenna.
Ensure high isolation between the primary (ANT1) and the secondary (ANT2) antenna.
Ensure low Envelope Correlation Coefficient between the primary (ANT1) and the secondary (ANT2)
antenna: the 3D antenna radiation patterns should have radiation lobes in different directions.
Ensure high isolation between the cellular antennas and any other antenna or transmitter.