Integration Manual

TOBY-L2 and MPCI-L2 series - System Integration Manual
UBX-13004618 - R04 Advance Information Design-in
Page 105 of 141
2.6.3.2 Guidelines for DDC (I
2
C) layout design
The DDC (I
2
C) serial interface requires the same consideration regarding electro-magnetic interference as any
other digital interface. Keep the traces short and avoid coupling with RF line or sensitive analog inputs, since the
signals can cause the radiation of some harmonics of the digital data frequency.
2.6.4 Secure Digital Input Output interface (SDIO)
The SDIO Secure Digital Input Output interface is not available on MPCI-L2 series modules.
2.6.4.1 Guidelines for SDIO circuit design
The functionality of the SDIO_D0, SDIO_D1, SDIO_D2, SDIO_D3, SDIO_CLK, SDIO_CMD pins is not
supported by TOBY-L2x0-00S: the pins should be not driven improperly by any external device.
TOBY-L2 series modules include a 4-bit Secure Digital Input Output interface (SDIO_D0, SDIO_D1, SDIO_D2,
SDIO_D3, SDIO_CLK, SDIO_CMD) available to communicate with an external Wi-Fi chip.
Guidelines for SDIO circuit design will be described in detail in a successive release of the document.
Do not apply voltage to any SDIO interface pin before the switch-on of SDIO interface supply source
(V_INT), to avoid latch-up of circuits and allow a proper boot of the module. If the external signals
connected to the cellular module cannot be tri-stated or set low, insert a multi channel digital switch (e.g.
TI SN74CB3Q16244, TS5A3159, or TS5A63157) between the two-circuit connections and set to high
impedance before V_INT switch-on.
ESD sensitivity rating of SDIO interface pins is 1 kV (Human Body Model according to JESD22-A114).
Higher protection level could be required if the lines are externally accessible and it can be achieved by
mounting a very low capacitance ESD protection (e.g. Tyco Electronics PESD0402-140 ESD), close to
accessible points.
If the SDIO interface pins are not used, they can be left unconnected on the application board.
2.6.4.2 Guidelines for SDIO layout design
The SDIO serial interface requires the same consideration regarding electro-magnetic interference as any other
high speed digital interface.
Keep the traces short and avoid coupling with RF lines / parts or sensitive analog inputs, since the signals can
cause the radiation of some harmonics of the digital data frequency.
Consider the usage of low value series damping resistors to avoid reflections and other losses in signal integrity,
which may create ringing and loss of a square wave shape. However, the resistor value should not be so high
that the rise / fall time requirements are violated: for example, 22  or 33  resistor may be sufficient to slow
the signal and remove the ringing problem.