User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocate®
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX and SARA-U270 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
C5 C8
GND
C7C6 C9
SARA
-G3 / SARA-U2
52
VCC
53
VCC
51
VCC
+
USB
Supply
C3
R4
θ
U1
I
USB
I
AC
I
END
T
PRG
SD
V
IN
V
INSNS
MODE
ISEL
C2C1
5V
TH
GND
V
OUT
V
OSNS
V
REF
R1
R2
R3
Li-Ion/Li-Pol
Battery Pack
D1
B1
C4
Li-Ion/Li
-Polymer
Battery Charger IC
D2
Figure 41: Li-Ion (or Li-Polymer) battery charging application circuit
Reference Description Part Number - Manufacturer
B1
Li-Ion (or Li-Polymer) battery pack with 470 Ω NTC
Various manufacturer
C1, C4 1 µF Capacitor Ceramic X7R 0603 10% 16 V GRM188R71C105KA12 - Murata
C2, C6 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 - Murata
C3 1 nF Capacitor Ceramic X7R 0402 10% 50 V GRM155R71H102KA01 - Murata
C5
330 µF Capacitor Tantalum D_SIZE 6.3 V 45 mΩ
T520D337M006ATE045 - KEMET
C7 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R61A104KA01 - Murata
C8 56 pF Capacitor Ceramic C0G 0402 5% 25 V GRM1555C1E560JA01 - Murata
C9 15 pF Capacitor Ceramic C0G 0402 5% 25 V GRM1555C1E150JA01 - Murata
D1, D2 Low Capacitance ESD Protection CG0402MLE-18G - Bourns
R1, R2
24 kΩ Resistor 0402 5% 0.1 W
RC0402JR-0724KL - Yageo Phycomp
R3
3.3 kΩ Resistor 0402 5% 0.1 W
RC0402JR-073K3L - Yageo Phycomp
R4
1.0 kΩ Resistor 0402 5% 0.1 W
RC0402JR-071K0L - Yageo Phycomp
U1 Single Cell Li-Ion (or Li-Polymer) Battery Charger IC
for USB port and AC Adapter
L6924U - STMicroelectronics
Table 26: Suggested components for Li-Ion (or Li-Polymer) battery charging application circuit
2.2.1.8 Guidelines for external battery charging and power path management circuit
Application devices where both a permanent primary supply / charging source (e.g. ~12 V) and a rechargeable
back-up battery (e.g. 3.7 V Li-Pol) are available at the same time as possible supply source should implement a
suitable charger / regulator with integrated power path management function to supply the module and the
whole device while simultaneously and independently charging the battery.
Figure 42 reports a simplified block diagram circuit showing the working principle of a charger / regulator with
integrated power path management function. This component allows the system to be powered by a permanent
primary supply source (e.g. ~12 V) using the integrated regulator which simultaneously and independently
recharges the battery (e.g. 3.7 V Li-Pol) that represents the back-up supply source of the system: the power path
management feature permits the battery to supplement the system current requirements when the primary
supply source is not available or cannot deliver the peak system currents.
A power management IC should meet the following prerequisites to comply with the module VCC requirements
summarized in Table 7:
• High efficiency internal step down converter, compliant with the performances specified in section 2.2.1.2
• Low internal resistance in the active path Vout – Vbat, typically lower than 50 mΩ
• High efficiency switch mode charger with separate power path control
UBX-13000995 - R12 Early Production Information Design-in
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