User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocate®
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX and SARA-U270 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
1.4 Operating modes
SARA-G3 modules have several operating modes. The operating modes defined in Table 5 and described in
detail in Table 6 provide general guidelines for operation.
General Status Operating Mode Definition
Power-down Not-Powered Mode VCC supply not present or below operating range: module is switched off.
Power-Off Mode VCC supply within operating range and module is switched off.
Normal Operation Idle-Mode Module processor core runs with 32 kHz reference, that is generated by:
• The internal 32 kHz oscillator (SARA-G340, SARA-G350 and SARA-U2 series)
• The 32 kHz signal provided at the EXT32K pin (SARA-G300 and SARA-G310)
Active-Mode Module processor core runs with 26 MHz reference generated by the internal oscillator.
Connected-Mode Voice or data call enabled and processor core runs with 26 MHz reference.
Table 5: Module operating modes definition
Operating
Mode
Description Transition between operating modes
Not-Powered Module is switched off.
Application interfaces are not accessible.
Internal RTC operates on SARA-G340/G350,
SARA-U2 if a valid voltage is applied to V_BCKP.
Additionally, a proper external 32 kHz signal
must be fed to EXT32K on SARA-G300/G310
modules to let internal RTC timer running.
When VCC supply is removed, the module enters not-powered mode.
When in not-powered mode, the modules cannot be switched on by
PWR_ON, RESET_N or RTC alarm.
When in not-powered mode, the modules can be switched on applying
VCC supply (see 2.3.1) so that the module switches from not-powered
to active-mode.
Power-Off Module is switched off: normal shutdown by an
appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
Internal RTC operates on SARA-G340/G350,
SARA-U2 as V_BCKP is internally generated.
A proper external 32 kHz signal must be fed to
the EXT32K pin on SARA-G300/G310 to let RTC
timer running that otherwise is not in operation.
When the module is switched off by an appropriate power-off event
(see 1.6.2), the module enters power-off mode from active-mode.
When in power-off mode, the modules can be switched on by
PWR_ON, RESET_N or RTC alarm (see 2.3.1): the module switches
from power-off to active-mode.
When VCC supply is removed, the module switches from power-off
mode to not-powered mode.
Idle The module is not ready to communicate with
an external device by means of the application
interfaces as configured to reduce consumption.
The module automatically enters idle-mode
whenever possible if power saving is enabled by
the AT+UPSV command (see u-blox AT
Commands Manual [3]), reducing power
consumption (see section 1.5.1.4).
The CTS output line indicates when the UART
interface is disabled/enabled due to the module
idle/active-mode according to power saving and
HW flow control settings (see 1.9.1.3, 1.9.1.4).
Power saving configuration is not enabled by
default: it can be enabled by AT+UPSV (see the
u-blox AT Commands Manual [3]).
A proper 32 kHz signal must be fed to the
EXT32K pin of SARA-G300/G310 modules to let
idle-mode that otherwise cannot be reached
(this is not needed for the other SARA-G3 and
SARA-U2 series modules).
The module automatically switches from active-mode to idle-mode
whenever possible if power saving is enabled (see sections 1.5.1.4,
1.9.1.4 and to the u-blox AT Commands Manual [3], AT+UPSV).
The module wakes up from idle to active mode in the following events:
• Automatic periodic monitoring of the paging channel for the
paging block reception according to network conditions (see
1.5.1.4, 1.9.1.4)
• Automatic periodic enable of the UART interface to receive and
send data, if AT+UPSV=1 power saving is set (see 1.9.1.4)
• RTC alarm occurs (see u-blox AT Commands Manual [3], +CALA)
• Data received on UART interface, according to HW flow control
(AT&K) and power saving (AT+UPSV) settings (see 1.9.1.4)
• RTS input line set to the ON state by the DTE, if HW flow control
is disabled by AT&K3 and AT+UPSV=2 is set (see 1.9.1.4)
• DTR input line set to the ON state by the DTE, if AT+UPSV=3
power saving is set (see 1.9.1.4)
• USB detection, applying 5 V (typ.) to VUSB_DET input (see 1.9.3)
• The connected USB host forces a remote wakeup of the module
as USB device (see 1.9.3)
• GNSS data ready: when the GPIO3 pin is informed by the
connected u-blox GNSS receiver that it is ready to send data over
the DDC (I
2
C) communication interface (see 1.11, 1.9.4)
UBX-13000995 - R12 Early Production Information System description
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