User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocateTM
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08 Objective Specification Design-in
Page 85 of 188
Figure 37 and the components listed in Table 17 show an example of a low cost power supply circuit, where the
VCC module supply is provided by a step-down switching regulator capable of delivering to VCC pins the
specified maximum peak / pulse current, transforming a 12 V supply input.
SARA-G3 / SARA-U2
12V
R5
C6C1
VCC
INH
FSW
SYNC
OUT
GND
2
6
3
1
7
8
C3
C2
D1
R1
R2
L1
U1
GND
FB
COMP
5
4
R3
C4
R4
C5
52
VCC
53
VCC
51
VCC
Figure 37: Suggested low cost solution for the VCC voltage supply application circuit using step-down regulator
Reference
Description
Part Number - Manufacturer
C1
22 µF Capacitor Ceramic X5R 1210 10% 25 V
GRM32ER61E226KE15 – Murata
C2
100 µF Capacitor Tantalum B_SIZE 20% 6.3V 15m
T520B107M006ATE015 – Kemet
C3
5.6 nF Capacitor Ceramic X7R 0402 10% 50 V
GRM155R71H562KA88 – Murata
C4
6.8 nF Capacitor Ceramic X7R 0402 10% 50 V
GRM155R71H682KA88 – Murata
C5
56 pF Capacitor Ceramic C0G 0402 5% 50 V
GRM1555C1H560JA01 – Murata
C6
220 nF Capacitor Ceramic X7R 0603 10% 25 V
GRM188R71E224KA88 – Murata
D1
Schottky Diode 25V 2 A
STPS2L25 – STMicroelectronics
L1
5.2 µH Inductor 30% 5.28A 22 m
MSS1038-522NL – Coilcraft
R1
4.7 k Resistor 0402 1% 0.063 W
RC0402FR-074K7L – Yageo
R2
910 Resistor 0402 1% 0.063 W
RC0402FR-07910RL – Yageo
R3
82 Resistor 0402 5% 0.063 W
RC0402JR-0782RL – Yageo
R4
8.2 k Resistor 0402 5% 0.063 W
RC0402JR-078K2L – Yageo
R5
39 k Resistor 0402 5% 0.063 W
RC0402JR-0739KL – Yageo
U1
Step-Down Regulator 8-VFQFPN 3 A 1 MHz
L5987TR – ST Microelectronics
Table 17: Suggested components for low cost solution VCC voltage supply application circuit using a step-down regulator
2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
The use of a linear regulator is suggested when the difference from the available supply rail and the VCC value is
low: linear regulators provide high efficiency when transforming a 5 V supply to a voltage value within the
module VCC normal operating range.
The characteristics of the LDO linear regulator connected to the VCC pins should meet the following
prerequisites to comply with the module VCC requirements summarized in Table 7:
Power capabilities: the LDO linear regulator with its output circuit must be capable of providing a proper
voltage value to the VCC pins and of delivering to VCC pins the specified maximum peak / pulse current
with 1/8 duty cycle (refer to the SARA-G3 series Data Sheet [1] or the SARA-U2 series Data Sheet [2])
Power dissipation: the power handling capability of the LDO linear regulator must be checked to limit its
junction temperature to the maximum rated operating range (i.e. check the voltage drop from the max input
voltage to the min output voltage to evaluate the power dissipation of the regulator)