User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocateTM
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08 Objective Specification System description
Page 53 of 188
1.9.1.5 Multiplexer protocol (3GPP 27.010)
SARA-G3 and SARA-U2 series modules have a software layer with MUX functionality, the 3GPP TS 27.010
Multiplexer Protocol [13], available on the UART physical link. The auxiliary UART, the USB and the DDC (I
2
C)
serial interfaces do not support the multiplexer protocol.
This is a data link protocol (layer 2 of OSI model) which uses HDLC-like framing and operates between the
module (DCE) and the application processor (DTE) and allows a number of simultaneous sessions over the used
physical link (UART or SPI): the user can concurrently use AT command interface on one MUX channel and
Packet-Switched / Circuit-Switched Data communication on another multiplexer channel. Each session consists of
a stream of bytes transferring various kinds of data such as SMS, CBS, PSD, GNSS, AT commands in general. This
permits, for example, SMS to be transferred to the DTE when a data connection is in progress.
The following virtual channels are defined:
Channel 0: control channel
Channel 1: AT and Data
Channel 2: AT and Data
Channel 3: AT and Data (not available on SARA-G300 / SARA-G310 modules)
Channel 4: AT and Data (not available on SARA-G300 / SARA-G310 modules)
Channel 5: AT and Data (not available on SARA-G300 / SARA-G310 modules)
Channel 6: GNSS tunneling (not available on SARA-G300 / SARA-G310 modules)
Channel 7: SIM Access Profile (not available on SARA-G3 series modules)
For more details, refer to Mux implementation Application Note [23].
1.9.2 Auxiliary asynchronous serial interface (UART AUX)
The auxiliary UART interface is not available on SARA-U2 series modules.
SARA-G3 modules provide the auxiliary UART interface: it is a 3-wire unbalanced 1.8 V asynchronous serial
interface (only the RXD_AUX data output and TXD_AUX data input are provided), available for module FW
upgrade by means of the u-blox EasyFlash tool and for diagnostic purpose.
The AT commands interface is not available on the auxiliary UART interface.
1.9.3 USB interface
The USB interface is not available on SARA-G3 series modules.
1.9.3.1 USB features
SARA-U2 modules include a High-Speed USB 2.0 compliant interface with maximum data rate of 480 Mb/s
between the module and a host processor.
The module itself acts as a USB device and can be connected to any USB host such as a Personal Computer or an
embedded application microprocessor for AT commands, data communication, FW upgrade by means of the
FOAT feature, FW upgrade by means of the u-blox EasyFlash tool and for diagnostic purpose.
The USB_D+/USB_D- pins carry USB serial data and signaling while the VUSB_DET input pin senses the VBUS
USB supply presence (nominally +5 V at the source) to detect the host connection and enable the interface.
The USB interface of the module is enabled only if a valid voltage is detected by the VUSB_DET input (see the
SARA-U2 series Data Sheet [2]). Neither the USB interface, nor the whole module is supplied by the VUSB_DET
input: the VUSB_DET senses the USB supply voltage and absorbs few microamperes.