User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocateTM
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08 Objective Specification System description
Page 31 of 188
1.6 System function interfaces
1.6.1 Module power-on
1.6.1.1 Switch-on events
Table 9 summarizes the possible switch-on events for the SARA-G3 and SARA-U2 series modules.
SARA-G3
SARA-U2
From
Not-Powered Mode
Applying valid VCC supply voltage (i.e. VCC rise edge),
ramping from 2.5 V to 3.2 V within 4 ms
Applying valid VCC supply voltage (i.e. VCC rise edge),
ramping from 2.5 V to 3.2 V within 1 ms
From
Power-Off Mode
Low level on PWR_ON pin for 5 ms min.
Low pulse on PWR_ON pin for 50 µs min. / 80 µs max.
RTC alarm programmed by AT+CALA command
(Not supported by SARA-G300 / SARA-G310)
RTC alarm programmed by AT+CALA command
RESET_N pin released from low level
Table 9: Summary of SARA-G3 and SARA-U2 modules’ switch-on events
When the SARA-G3 and SARA-U2 series modules are in the not-powered mode (i.e. switched off with the VCC
module supply not applied), they can be switched on by:
Rising edge on the VCC supply input to a valid voltage for modules supply: the modules switch on applying
VCC supply starting from a voltage value lower than 2.25 V, providing a fast VCC voltage slope, as it must
ramp from 2.5 V to 3.2 V within 4 ms on SARA-G3 modules and within 1 ms on SARA-U2 modules, and
reaching a proper nominal VCC voltage value within the normal operating range.
Alternately, the RESET_N pin can be held low during the VCC rising edge, so that the module switches on
by releasing the RESET_N pin when the VCC voltage stabilizes at its nominal value within the normal range.
The status of the PWR_ON input pin of SARA-G3 and SARA-U2 series modules while applying the VCC module
supply is not relevant: during this phase the PWR_ON pin can be set high or low by the external circuit.
When the SARA-G3 and SARA-U2 series modules are in the power-off mode (i.e. switched off by means of the
AT+CPWROFF command, with valid VCC module supply applied), they can be switched on by:
Low level / pulse on PWR_ON pin, which is normally set high by an external pull-up, for a valid time period.
As described in Figure 17, there is no internal pull-up resistor on the PWR_ON pin of the modules: the pin has
high input impedance and is weakly pulled high by the internal circuit. Therefore the external circuit must be
able to hold the high logic level stable, e.g. providing an external pull-up resistor (for design-in see section 2.3.1).
The PWR_ON input voltage thresholds are different from the other generic digital interfaces of the modules:
refer to SARA-G3 series Data Sheet [1] and SARA-U2 series Data Sheet [2] for detailed electrical characteristics.
Baseband
Processor
15
PWR_ON
SARA-G3 / SARA-U2 series
Power-on
Power
Management
Power-on
Figure 17: PWR_ON input description
The SARA-G340, SARA-G350 and SARA-U2 series can be also switched on from power-off mode by:
RTC alarm pre-programmed by AT+CALA command at specific time (see u-blox AT Commands Manual [3]).
The SARA-U2 series modules can be also switched on from power-off mode by:
Low pulse on the RESET_N pin, which is normally set high by an internal pull-up (refer to section 1.6.3 and
to the SARA-U2 series Data Sheet [2] for the description of the RESET_N input electrical characteristics).