User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocateTM
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08 Objective Specification Appendix
Page 183 of 188
B.3 Schematic for SARA-G3 and SARA-U2 integration
Figure 94 shows an example of schematic diagram where a SARA-G3 or SARA-U2 series module can be
integrated into the same application board, using all the available interfaces and functions of the modules. The
different mounting options for the external parts are highlighted in different colors as described in the legend,
according to the interfaces supported by the relative modules.
TXD
RXD
RTS
CTS
DTR
DSR
RI
DCD
GND
12 TXD
9 DTR
13 RXD
10 RTS
11 CTS
6 DSR
7 RI
8 DCD
GND
3V8
GND
330µF
10nF100nF 56pF
SARA-G3 / SARA-U2
52 VCC
53 VCC
51 VCC
+
100µF
2 V_BCKP
GND GND
GND
RTC
back-up
1.8V UART DTE
1.8V UART DTE
16 RSVD / GPIO1
3V8
Network
Indicator
18 RESET_N
Application
Processor
Open
Drain
Output
15 PWR_ON
100k
Open
Drain
Output
TXD
RXD
29
TXD_AUX / USB_D+
28
RXD_AUX / USB_D-
0Ω
0Ω
TP
TP
15pF
33 RSVD
V_BCKP
TP
TP
47pF
SIM Card
Connector
CCVCC (C1)
CCVPP (C6)
CCIO (C7)
CCCLK (C3)
CCRST (C2)
GND (C5)
47pF 47pF 100nF
41VSIM
39SIM_IO
38SIM_CLK
40SIM_RST
47pF
SW1
SW2
4V_INT
42SIM_DET
470k
ESD ESD ESD ESD ESD ESD
56ANT
62ANT_DET
10k 82nH
33pF
Connector
27pF
ESD
External
Antenna
1k
TP
u-blox 1.8V
GNSS Receiver
4.7k
OUTIN
GND
LDO Regulator
SHDN
RSVD / SDA
RSVD / SCL
4.7k
3V8 1V8_GPS
SDA2
SCL2
32K_OUT / GPIO3
RSVD / GPIO4
TxD1
EXTINT0
26
27
24
25
47k
VCC
RSVD / GPIO2
23
V_INT
BCLK
LRCLK
10µF1µF
Audio Codec
MAX9860
SDIN
SDOUT
SDA
SCL
36RSVD / I2S_CLK
34RSVD / I2S_WA
35RSVD / I2S_TXD
37RSVD / I2S_RXD
19RSVD / CODEC_CLK MCLK
IRQn
10k
100nF
VDD
Speaker
OUTP
OUTN
Microphone
MICBIAS
1µF
2.2k
1µF
1µF
MICLN
MICLP
MICGND
2.2k
ESD ESD
V_INT
10nF10nF
EMI
EMI
27pF27pF
10nF
EMI
EMI
ESD ESD
27pF27pF10nF
31EXT32K / RSVD
0Ω
49RSVD / MIC_P
2.2k
2.2k 2.2k
48RSVD / MIC_N
2.2k
10uF
46RSVD / MIC_BIAS
47RSVD / MIC_GND
100nF
100nF
44RSVD / SPK_P
45RSVD / SPK_N
V_INT
VBUS
D+
D-
GND
17
RSVD / VUSB_DET
GND
USB 2.0 Host
0Ω
0Ω
0Ω
0Ω
0Ω
TP
TP
TP
0Ω for SARA-G300 / SARA-G310
Mount for SARA-G300 / SARA-G310 modules
Mount for SARA-G340 / SARA-G350 modules
Mount for SARA-U2 modules
Mount for SARA-G3 modules
Mount for SARA-G340 / SARA-G350 / SARA-U2 modules
Mount for SARA-G3 and SARA-U2 modules
LEGEND
+
0Ω
0Ω
0Ω
TP
TP
15pF
39nH
0Ω for SARA-G3 modules
Figure 94: Example of complete schematic diagram to integrate SARA-G3 and SARA-U2 modules on the same application board