User's Manual
Table Of Contents
- Preface
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Antenna interface
- 1.8 SIM interface
- 1.9 Serial interfaces
- 1.9.1 Asynchronous serial interface (UART)
- 1.9.1.1 UART features
- 1.9.1.2 UART AT interface configuration
- 1.9.1.3 UART signal behavior
- 1.9.1.4 UART and power-saving
- AT+UPSV=0: power saving disabled, fixed active-mode
- AT+UPSV=1: power saving enabled, cyclic idle/active-mode
- AT+UPSV=2: power saving enabled and controlled by the RTS line
- AT+UPSV=3: power saving enabled and controlled by the DTR line
- Wake up via data reception
- Additional considerations for SARA-U2 modules
- 1.9.1.5 Multiplexer protocol (3GPP 27.010)
- 1.9.2 Auxiliary asynchronous serial interface (UART AUX)
- 1.9.3 USB interface
- 1.9.4 DDC (I2C) interface
- 1.9.1 Asynchronous serial interface (UART)
- 1.10 Audio interface
- 1.11 General Purpose Input/Output (GPIO)
- 1.12 Reserved pins (RSVD)
- 1.13 System features
- 1.13.1 Network indication
- 1.13.2 Antenna detection
- 1.13.3 Jamming detection
- 1.13.4 TCP/IP and UDP/IP
- 1.13.5 FTP
- 1.13.6 HTTP
- 1.13.7 SMTP
- 1.13.8 SSL
- 1.13.9 Dual stack IPv4/IPv6
- 1.13.10 Smart temperature management
- 1.13.11 AssistNow clients and GNSS integration
- 1.13.12 Hybrid positioning and CellLocateTM
- 1.13.13 Firmware upgrade Over AT (FOAT)
- 1.13.14 Firmware upgrade Over The Air (FOTA)
- 1.13.15 In-Band modem (eCall / ERA-GLONASS)
- 1.13.16 SIM Access Profile (SAP)
- 1.13.17 Power saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a Low Drop-Out (LDO) linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for external battery charging circuit
- 2.2.1.8 Guidelines for external battery charging and power path management circuit
- 2.2.1.9 Guidelines for VCC supply layout design
- 2.2.1.10 Guidelines for grounding layout design
- 2.2.2 RTC supply (V_BCKP)
- 2.2.3 Interface supply (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interface
- 2.6 Serial interfaces
- 2.6.1 Asynchronous serial interface (UART)
- 2.6.1.1 Guidelines for UART circuit design
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TXD, RXD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TXD, RXD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TXD and RXD lines only (not using the complete V24 link)
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 Auxiliary asynchronous serial interface (UART AUX)
- 2.6.3 Universal Serial Bus (USB)
- 2.6.4 DDC (I2C) interface
- 2.6.1 Asynchronous serial interface (UART)
- 2.7 Audio interface
- 2.7.1 Analog audio interface
- 2.7.1.1 Guidelines for microphone and speaker connection circuit design (headset / handset modes)
- 2.7.1.2 Guidelines for microphone and loudspeaker connection circuit design (hands-free mode)
- 2.7.1.3 Guidelines for external analog audio device connection circuit design
- 2.7.1.4 Guidelines for analog audio layout design
- 2.7.2 Digital audio interface
- 2.7.1 Analog audio interface
- 2.8 General Purpose Input/Output (GPIO)
- 2.9 Reserved pins (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Thermal guidelines
- 2.13 ESD guidelines
- 2.14 SARA-G350 ATEX integration in explosive atmospheres applications
- 2.15 Schematic for SARA-G3 and SARA-U2 series module integration
- 2.16 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between LISA and SARA-G3 modules
- A.1 Overview
- A.2 Checklist for migration
- A.3 Software migration
- A.4 Hardware migration
- B Migration between SARA-G3 and SARA-U2
- C Glossary
- Related documents
- Revision history
- Contact
SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08 Objective Specification Design-in
Page 121 of 188
2.6.3 Universal Serial Bus (USB)
USB interface is not supported by SARA-G3 modules.
2.6.3.1 Guidelines for USB circuit design
The USB_D+ and USB_D- lines carry the USB serial data and signaling. The lines are used in single ended mode
for full speed signaling handshake, as well as in differential mode for high speed signaling and data transfer.
USB pull-up or pull-down resistors on USB_D+ and USB_D- as required by the Universal Serial Bus Revision 2.0
specification [14] are part of the USB pin driver and do not need to be externally provided.
Series resistors on USB_D+ and USB_D- as required by Universal Serial Bus Revision 2.0 specification [14] are
also integrated and do not need to be externally provided.
Since the module acts as a USB device, the VBUS USB supply (5.0 V typ.) generated by the USB host must be
connected to the VUSB_DET input, which absorbs few microamperes to sense the host connection and enable
the USB interface of the module.
If connecting the USB_D+ and USB_D- pins to a USB device connector, the pin will be externally accessible on
the application device. According to EMC/ESD requirements of the application, an additional ESD protection
device with very low capacitance should be provided close to accessible point on the line connected to this pin,
as described in Figure 68 and Table 36.
The USB interface pins ESD sensitivity rating is 1 kV (Human Body Model according to JESD22-A114F).
Higher protection level could be required if the lines are externally accessible and it can be achieved by
mounting a very low capacitance (i.e. less or equal to 1 pF) ESD protection (e.g. Tyco Electronics
PESD0402-140 ESD protection device) on the lines connected to these pins, close to accessible points.
The USB pins of the modules can be directly connected to the USB host application processor without additional
ESD protections if they are not externally accessible or according to EMC/ESD requirements.
SARA-U2 series
D+
D-
GND
29
USB_D+
28
USB_D-
GND
USB DEVICE
CONNECTOR
D1 D2
VBUS
SARA-U2 series
D+
D-
GND
29
USB_D+
28
USB_D-
GND
USB HOST
PROCESSOR
C1
17
VUSB_DET
C1
17
VUSB_DET
VBUS
D3
Figure 68: USB Interface application circuits
Reference
Description
Part Number - Manufacturer
C1
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R61A104KA01 - Murata
D1, D2, D3
Very Low Capacitance ESD Protection
PESD0402-140 - Tyco Electronics
Table 36: Component for USB application circuits
If the USB interface is not required by the customer application, as the UART interface is used for AT and
data communication with the host application processor, the USB pins can be left unconnected, but it is
highly recommended providing direct access on the application board by means of accessible testpoint
directly connected to the VUSB_DET, USB_D+, USB_D- pins of SARA-U2 modules.