Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Applications
- 1.3 Architecture
- 1.4 Pin assignments
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Debug
- 1.8 GPIO pins
- 1.9 Analog interfaces
- 1.10 Serial interfaces
- 1.10.1 Universal Asynchronous Receiver/Transmitter (UART)
- 1.10.2 Serial Peripheral Interface (SPI)
- 1.10.3 Quad Serial Peripheral Interface (QSPI)
- 1.10.4 Inter-Integrated Circuit (I2C) interface
- 1.10.5 Pulse Width Modulation (PWM) interface
- 1.10.6 Inter-IC Sound (I2S) interface
- 1.10.7 Pulse Density Modulation (PDM) interface
- 1.10.8 USB 2.0 device interface
- 1.11 Antenna interface
- 1.12 Reserved pins (RSVD)
- 1.13 GND pins
- 2 Software
- 3 Flashing application software
- 4 Design-in
- 5 Handling and soldering
- 6 Regulatory information and requirements
- 6.1 ETSI – European market
- 6.2 FCC/ISED – US/Canadian markets
- 6.3 MIC - Japanese market (pending)
- 6.4 NCC – Taiwanese market (pending)
- 6.5 KCC – South Korean market (pending)
- 6.6 ANATEL Brazil compliance (pending)
- 6.7 Australia and New Zealand regulatory compliance (pending)
- 6.8 South Africa regulatory compliance (pending)
- 6.9 Integration checklist
- 6.10 Pre-approved antennas list
- 7 Technology standards compliance
- 8 Product testing
- Appendix
- A Glossary
- B Antenna reference designs
- Related documents
- Revision history
- Contact
NORA-B1 series - System integration manual
UBX-20027617 - R04 System description Page 9 of 61
C1-Public
Figure 2: NORA-B1 normal voltage power connection
In high voltage mode, a single power source is connected only to VDDH. The high voltage regulator
(VREGH) then generates VDD, which can be configured between 1.8 and 3.3 VDC through
VREGHVOUT in the user information configuration register (UICR) of the application core.
Figure 3: NORA-B1 high voltage power connection
The high voltage, radio voltage, and main voltage regulators have both a low drop-out regulator
(LDO) and DC-DC converter. No additional components are required to use the DC-DC converters.
Once the DC-DC converters are enabled by the application, switching between the LDO and DC-DC
converter is automatic based on the required current.
☞ In high voltage mode, VDD can provide a maximum external current of 7 mA (via VDD and
GPIO pins) when VREGMAIN and VREGRADIO are in DC-DC mode and a maximum of 1 mA
when they are in mode LDO or during System OFF.