Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Applications
- 1.3 Architecture
- 1.4 Pin assignments
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Debug
- 1.8 GPIO pins
- 1.9 Analog interfaces
- 1.10 Serial interfaces
- 1.10.1 Universal Asynchronous Receiver/Transmitter (UART)
- 1.10.2 Serial Peripheral Interface (SPI)
- 1.10.3 Quad Serial Peripheral Interface (QSPI)
- 1.10.4 Inter-Integrated Circuit (I2C) interface
- 1.10.5 Pulse Width Modulation (PWM) interface
- 1.10.6 Inter-IC Sound (I2S) interface
- 1.10.7 Pulse Density Modulation (PDM) interface
- 1.10.8 USB 2.0 device interface
- 1.11 Antenna interface
- 1.12 Reserved pins (RSVD)
- 1.13 GND pins
- 2 Software
- 3 Flashing application software
- 4 Design-in
- 5 Handling and soldering
- 6 Regulatory information and requirements
- 6.1 ETSI – European market
- 6.2 FCC/ISED – US/Canadian markets
- 6.3 MIC - Japanese market (pending)
- 6.4 NCC – Taiwanese market (pending)
- 6.5 KCC – South Korean market (pending)
- 6.6 ANATEL Brazil compliance (pending)
- 6.7 Australia and New Zealand regulatory compliance (pending)
- 6.8 South Africa regulatory compliance (pending)
- 6.9 Integration checklist
- 6.10 Pre-approved antennas list
- 7 Technology standards compliance
- 8 Product testing
- Appendix
- A Glossary
- B Antenna reference designs
- Related documents
- Revision history
- Contact
NORA-B1 series - System integration manual
UBX-20027617 - R04 Handling and soldering Page 39 of 61
C1-Public
The module is compatible with the industrial reflow profile for common SAC type RoHS solders. Use
of no-clean solder paste is strongly recommended.
The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer
efficiency of the oven, and type of solder paste used. The optimal soldering profile used must be
trimmed for each case depending on the specific process and PCB layout.
Process parameter
Unit
Target
Pre-heat
Ramp up rate to T
SMIN
K/s
3
T
SMIN
°C
150
T
SMAX
°C
200
t
S
(from +25 °C)
s
150
t
S
(Pre-heat)
s
60 to 120
Peak
T
L
°C
217
t
L
(time above T
L
)
s
40 to 60
T
P
(absolute max)
°C
245
Cooling
Ramp-down from T
L
K/s
4
Allowed soldering cycles
-
1
Table 14: Recommended reflow profile
Figure 12: Reflow profile
☞ Lower value of T
P
and slower ramp down rate (2 – 3 °C/sec) is preferred.
☞ After reflow soldering, optical inspection of the modules is recommended to verify proper
alignment.
⚠ Target values in Table 14 should be taken as general guidelines for a SAC type Pb-free process.
Refer to the JEDEC J-STD-020C [8] standard for further information.
5.3.2 Cleaning
Cleaning the modules is not recommended. Residues underneath the modules cannot be easily
removed with a washing process.
• Cleaning with water will lead to capillary effects where water is absorbed in the gap between the
host board and the module. The combination of residues of soldering flux and encapsulated
water can lead to short circuits or resistor-like interconnections between neighboring pads.
Water will also damage the sticker and the inkjet printed text.