Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Applications
- 1.3 Architecture
- 1.4 Pin assignments
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Debug
- 1.8 GPIO pins
- 1.9 Analog interfaces
- 1.10 Serial interfaces
- 1.10.1 Universal Asynchronous Receiver/Transmitter (UART)
- 1.10.2 Serial Peripheral Interface (SPI)
- 1.10.3 Quad Serial Peripheral Interface (QSPI)
- 1.10.4 Inter-Integrated Circuit (I2C) interface
- 1.10.5 Pulse Width Modulation (PWM) interface
- 1.10.6 Inter-IC Sound (I2S) interface
- 1.10.7 Pulse Density Modulation (PDM) interface
- 1.10.8 USB 2.0 device interface
- 1.11 Antenna interface
- 1.12 Reserved pins (RSVD)
- 1.13 GND pins
- 2 Software
- 3 Flashing application software
- 4 Design-in
- 5 Handling and soldering
- 6 Regulatory information and requirements
- 6.1 ETSI – European market
- 6.2 FCC/ISED – US/Canadian markets
- 6.3 MIC - Japanese market (pending)
- 6.4 NCC – Taiwanese market (pending)
- 6.5 KCC – South Korean market (pending)
- 6.6 ANATEL Brazil compliance (pending)
- 6.7 Australia and New Zealand regulatory compliance (pending)
- 6.8 South Africa regulatory compliance (pending)
- 6.9 Integration checklist
- 6.10 Pre-approved antennas list
- 7 Technology standards compliance
- 8 Product testing
- Appendix
- A Glossary
- B Antenna reference designs
- Related documents
- Revision history
- Contact
NORA-B1 series - System integration manual
UBX-20027617 - R04 Design-in Page 26 of 61
C1-Public
• The characteristic impedance can be calculated as a first iteration by using tools provided by the
layout software. It is advisable to ask the PCB manufacturer for the final values that are usually
calculated using dedicated software and the available stack-ups from production. To measure
the real impedance of the traces, you might also ask the manufacturer to attach an impedance
coupon to the side of the panel.
• Despite the high losses anticipated at high frequencies, FR-4 dielectric materials can be
considered in RF designs, providing that:
o RF trace lengths are minimized to reduce dielectric losses.
o If traces longer than a few centimeters are needed, the use of coaxial connectors and cables
are advised to reduce anticipated losses.
o Stack-up should allow for thick 50 traces. A trace width of at least 200 µm is recommended
to ensure good impedance control during the PCB manufacturing process.
o FR-4 material exhibits poor thickness stability and poorer control of impedance over the trace
length. Contact the PCB manufacturer to find out about the specific tolerances of controlled
impedance traces.
• The width and spacing of transmission lines to GND must be uniform and routed as smoothly as
possible: route RF lines at 45° angles or in arcs.
• Add GND stitching vias around transmission lines.
• Ensure solid metal connection of the adjacent metal layer on the PCB stack-up to the main
ground layer, providing enough vias on the adjacent metal layer.
• Route RF transmission lines far from any noise source (such as switching supplies and digital
lines) and from any sensitive circuit to avoid crosstalk between RF traces and high impedance or
analog signals.
• Avoid stubs on the transmission lines; any component on the transmission line should be placed
with the connected pad over the trace. Also avoid any unnecessary components on RF traces.
Figure 6: Example of RF trace and ground plane design