Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Applications
- 1.3 Architecture
- 1.4 Pin assignments
- 1.5 Supply interfaces
- 1.6 System function interfaces
- 1.7 Debug
- 1.8 GPIO pins
- 1.9 Analog interfaces
- 1.10 Serial interfaces
- 1.10.1 Universal Asynchronous Receiver/Transmitter (UART)
- 1.10.2 Serial Peripheral Interface (SPI)
- 1.10.3 Quad Serial Peripheral Interface (QSPI)
- 1.10.4 Inter-Integrated Circuit (I2C) interface
- 1.10.5 Pulse Width Modulation (PWM) interface
- 1.10.6 Inter-IC Sound (I2S) interface
- 1.10.7 Pulse Density Modulation (PDM) interface
- 1.10.8 USB 2.0 device interface
- 1.11 Antenna interface
- 1.12 Reserved pins (RSVD)
- 1.13 GND pins
- 2 Software
- 3 Flashing application software
- 4 Design-in
- 5 Handling and soldering
- 6 Regulatory information and requirements
- 6.1 ETSI – European market
- 6.2 FCC/ISED – US/Canadian markets
- 6.3 MIC - Japanese market (pending)
- 6.4 NCC – Taiwanese market (pending)
- 6.5 KCC – South Korean market (pending)
- 6.6 ANATEL Brazil compliance (pending)
- 6.7 Australia and New Zealand regulatory compliance (pending)
- 6.8 South Africa regulatory compliance (pending)
- 6.9 Integration checklist
- 6.10 Pre-approved antennas list
- 7 Technology standards compliance
- 8 Product testing
- Appendix
- A Glossary
- B Antenna reference designs
- Related documents
- Revision history
- Contact
NORA-B1 series - System integration manual
UBX-20027617 - R04 System description Page 10 of 61
C1-Public
1.5.2 Digital I/O interfaces reference voltage
The digital I/O pins operating voltage is equal to VDD, regardless of whether it is connected to an
external source or generated from the high voltage regulator. As noted above, when in high voltage
mode, VDD voltage is configured through the VREGHVOUT register in the application core UICR.
1.5.3 USB supply input
If used by the application, apply the VBUS power from the upstream USB host port to the VBUS pin.
The USB voltage regulator is a 3.3V LDO regulator used to power the USB subsystem and provide a
reference voltage for the USB_DP and USB_DM signals.
1.5.4 VDD/VDDH application circuits
The power for NORA-B1 series modules is provided through the VDD and VDDH pins. The power can
be taken from any of the following sources:
• Switching Mode Power Supply (SMPS)
• Low Drop Out (LDO) regulator
• Battery
An SMPS is the ideal choice when the available primary supply source has a higher value than the
operating supply voltage of NORA-B1 series modules. The use of SMPS provides the best power
efficiency for the overall application and minimizes the current drawn from the main supply source.
⚠ When using an SMPS source, ensure that the AC voltage ripple at the switching frequency is
kept as low as possible. The layout must be implemented to minimize impact of high frequency
ringing.
The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage
where the typical 85-90% efficiency of the switching regulator leads to minimal current saving.
Linear regulators are not recommended for high voltage step-down, as they dissipate a considerable
amount of energy.
DC-DC efficiency should be evaluated as a tradeoff between active and idle duty cycles of the
specific application. Although some DC-DC conversion can be efficient for extremely light loads, DC-
DC conversion efficiency quickly degrades as the idle current drops below a few milliamps (mA),
which significantly reduces the battery life.
Due to the low current consumption and wide voltage range of NORA-B1, a battery can be used as a
main supply. The capacity of the battery should be selected to match the application. Care should be
taken to ensure that the battery can deliver the peak current required by the module. See the
NORA-B1 series data sheet [1] for the electrical specifications.
Although it is best practice to include decoupling capacitors on the supply rails close to the NORA-
B1 series module, the need for additional capacitance is normally dependent on the design of the
power routing in the host system.
1.6 System function interfaces
1.6.1 Module reset
You can reset NORA-B1 by applying a low level on the nRESET input pin, which is internally pulled
high to VDD. This causes an “external” or “hardware” reset of the module. The current parameter
settings are not saved in the non-volatile memory of the module and a proper network detach is not
performed.