Data Sheet

NINA-B40 series - Data sheet
UBX-19049405 - R04 Interfaces Page 14 of 40
C1 - Public
The master side of an I2S interface always provides the LRCK and SCK clock signals, but some master
devices cannot generate a MCK clock signal. NINA-B40 can supply a MCK clock signal in both master
and slave modes to provide to those external systems that cannot generate their own clock signal.
The two data signals - SDIN and SDOUT allow for simultaneous bi-directional audio streaming. The
interface supports 8, 16, and 24-bit sample widths with up to 48 kHz sample rate.
2.5.5 USB 2.0 interface
The NINA-B40 series modules include a full speed Universal Serial Bus (USB) device interface which is
compliant to version 2.0 of the USB specification. Characteristics of the USB interface include:
 Full speed device, up to 12 Mbit/s transfer speed
 MAC and PHY implemented in the hardware
 Pin configuration:
o VBUS, 5 V supply input, required to use the interface
o USB_DP, USB_DM, differential data pair
 Automatic or software-controlled pull up of the USB_DP pin
The USB interface has a dedicated power supply that requires a 5 V supply voltage to be applied to
the VBUS pin. This allows the USB interface to be used even though the rest of the module might be
battery powered or supplied by a 1.8 V supply etc.
2.6 Digital interfaces
2.6.1 Pulse Width Modulation (PWM)
NINA-B40 modules provide up to 16 independent PWM channels that can be used to generate complex
waveforms. The waveforms can be used to control motors, dim LEDs, or as audio signals if connected
to the speakers. Duty-cycle sequences may be stored in the RAM to be chained and looped into
complex sequences without CPU intervention. Each channel uses a single GPIO pin as output.
2.6.2 Pulse Density Modulation (PDM)
The pulse density modulation interface is used to read signals from external audio frontends like
digital microphones. It supports single or dual-channel (left and right) data input over a single GPIO
pin. It supports up to 16 kHz sample rate and 16 bit samples. The interface uses the DMA to
automatically move the sample data into RAM without CPU intervention. The interface uses two
signals - CLK to output the sample clock and DIN to read the sample data.
2.6.3 Quadrature Decoder (QDEC)
The quadrature decoder is used to read quadrature encoded data from mechanical and optical
sensors in the form of digital waveforms. Quadrature encoded data is often used to indicate rotation
of a mechanical shaft in either a positive or negative direction. The QDEC uses two inputs - PHASE_A
and PHASE_B, and an optional LED output signal. The interface has a selectable sample period
ranging from 128 µs to 131 ms.
2.7 Analog interfaces
10 out of the 40 digital GPIOs can be multiplexed to analog functions. The following analog functions
are available:
 1x 8-channel ADC
 1x Analog comparator*
 1x Low-power analog comparator*
*Only one comparator can be used at any given point in time.