Integration Manual
Table Of Contents
- Document Information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Power management
- 1.6 System functions
- 1.7 RF connection
- 1.8 (U)SIM interface
- 1.9 Serial communication
- 1.9.1 Serial interfaces configuration
- 1.9.2 Asynchronous serial interface (UART)
- 1.9.2.1 UART features
- 1.9.2.2 UART signal behavior
- 1.9.2.3 UART and power-saving
- 1.9.2.4 UART application circuits
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TxD, RxD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TxD, RxD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TxD and RxD lines only (not using the complete V24 link)
- Additional considerations
- 1.9.3 USB interface
- 1.9.4 SPI interface
- 1.9.5 MUX protocol (3GPP TS 27.010)
- 1.10 DDC (I2C) interface
- 1.11 Audio Interface
- 1.12 General Purpose Input/Output (GPIO)
- 1.13 Reserved pins (RSVD)
- 1.14 Schematic for LISA-U2 module integration
- 1.15 Approvals
- 1.15.1 European Conformance CE mark
- 1.15.2 US Federal Communications Commission notice
- 1.15.3 Innovation, Science, Economic Development Canada notice
- 1.15.4 Australian Regulatory Compliance Mark
- 1.15.5 ICASA Certification
- 1.15.6 KCC Certification
- 1.15.7 ANATEL Certification
- 1.15.8 CCC Certification
- 1.15.9 Giteki Certification
- 2 Design-In
- 3 Features description
- 3.1 Network indication
- 3.2 Antenna detection
- 3.3 Jamming Detection
- 3.4 TCP/IP and UDP/IP
- 3.5 FTP
- 3.6 HTTP
- 3.7 SSL/TLS
- 3.8 Dual stack IPv4/IPv6
- 3.9 AssistNow clients and GNSS integration
- 3.10 Hybrid positioning and CellLocate®
- 3.11 Control Plane Aiding / Location Services (LCS)
- 3.12 Firmware update Over AT (FOAT)
- 3.13 Firmware update Over the Air (FOTA)
- 3.14 In-Band modem (eCall / ERA-GLONASS)
- 3.15 SIM Access Profile (SAP)
- 3.16 Smart Temperature Management
- 3.17 Bearer Independent Protocol
- 3.18 Multi-Level Precedence and Pre-emption Service
- 3.19 Network Friendly Mode
- 3.20 Power saving
- 4 Handling and soldering
- 5 Product Testing
- Appendix
- A Migration from LISA-U1 to LISA-U2 series
- A.1 Checklist for migration
- A.2 Software migration
- A.2.1 Software migration from LISA-U1 series to LISA-U2 series modules
- A.3 Hardware migration
- A.3.1 Hardware migration from LISA-U1 series to LISA-U2 series modules
- A.3.2 Pin-out comparison LISA-U1 series vs. LISA-U2 series
- A.3.3 Layout comparison LISA-U1 series vs. LISA-U2 series
- B Glossary
- Related documents
- Revision history
- Contact
LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 97 of 182
Reference
Description
Part Number – Manufacturer
C1
100 nF Capacitor Ceramic X5R 0402 10% 10V
GRM155R71C104KA01 – Murata
C2, C4, C5, C6
1 µ F Capacitor Ceramic X5R 0402 10% 6.3 V
GRM155R60J105KE19 – Murata
C3
10 µ F Capacitor Ceramic X5R 0603 20% 6.3 V
GRM188R60J106ME47 – Murata
C7, C8, C9, C10
27 pF Capacitor Ceramic COG 0402 5% 25 V
GRM1555C1H270JZ01 – Murata
C11, C12, C13, C14
10 nF Capacitor Ceramic X5R 0402 10% 50V
GRM155R71C103KA88 – Murata
D1, D2
Low Capacitance ESD Protection
USB0002RP or USB0002DP – AVX
EMI1, EMI2, EMI3,
EMI4
Chip Ferrite Bead Noise/EMI Suppression Filter
1800 Ohm at 100 MHz, 2700 Ohm at 1 GHz
BLM15HD182SN1 – Murata
J1
Microphone Connector
Various manufacturers
J2
Speaker Connector
Various manufacturers
MIC
2.2 k Electret Microphone
Various manufacturers
R1, R2
4.7 kΩ Resistor 0402 5% 0.1 W
RC0402JR-074K7L - Yageo Phycomp
R3
10 kΩ Resistor 0402 5% 0.1 W
RC0402JR-0710KL - Yageo Phycomp
R4, R5
2.2 kΩ Resistor 0402 5% 0.1 W
RC0402JR-072K2L – Yageo Phycomp
SPK
32 Speaker
Various manufacturers
U1
16-Bit Mono Audio Voice Codec
MAX9860ETG+ - Maxim
Table 41: Example of components for audio voice codec application circuit
☞ Any external signal connected to the digital audio interface must be tri-stated or set low when the
module is in power-down mode and during the module power-on sequence (at least until the
activation of the V_INT supply output of the module), to avoid latch-up of circuits and allow a
proper boot of the module. If the external signals connected to the cellular module cannot be tri-
stated or set low, insert a multi-channel digital switch (e.g. Texas Instruments SN74CB3Q16244,
TS5A3159, or TS5A63157) between the two-circuit connections and set it to high impedance
during the module power-down mode and during the module power-on sequence.
☞ If the I
2
S digital audio pins are not used, they can be left unconnected on the application board.
1.11.4 Voiceband processing system
The voiceband processing on the LISA-U2 modules is implemented in the DSP core inside the
baseband chipset.
The external digital audio devices can be interfaced directly to the DSP digital processing part via the
I
2
S digital interface. With exception of the speech encoder/decoder, audio processing can be
controlled by AT commands.
The audio processing is implemented within the different blocks of the voiceband processing system:
Sample-based Voice-band Processing (single sample processed at 16 kHz for Wide Band AMR
codec or 8 kHz for all other speech codecs)
Frame-based Voice-band Processing (frames of 320 samples for Wide Band AMR codec or 160
samples for all other speech codecs are processed every 20 ms)
These blocks are connected by buffers (circular buffer and voiceband sample buffer) and sample rate
converters (for 8 / 16 to 47.6 kHz conversion).
The voiceband audio processing implemented in the DSP core of LISA-U2 series modules is
summarized in Figure 51.