Integration Manual

LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 94 of 182
1.11.1 I
2
S interface - PCM mode
Main features of the I
2
S interface in PCM mode:
 I
2
S runs in PCM - short alignment mode (configurable by AT commands)
 I
2
S word alignment signal can be configured to 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48 kHz
 I
2
S word alignment toggles high for 1 or 2 CLK cycles of synchronization (configurable), then
toggles low for 16 CLK cycles of sample width. Frame length can be 1 + 16 = 17 bits or 2 + 16 = 18
bits
 I
2
S clock frequency depends on the frame length and <sample_rate>. Can be 17 x <sample_rate>
or 18 x <sample_rate>
 I
2
S transmit and I
2
S receive data are 16-bit words long with the same sampling rate as I
2
S word
alignment, mono. Data is in 2’s complement notation. MSB is transmitted first
 When I
2
S word alignment toggles high, the first synchronization bit is always low. The second
synchronization bit (present only in case of 2 bit long I
2
S word alignment configuration) is MSB of
the transmitted word (MSB is transmitted twice in this case)
 I
2
S transmit data changes on the I
2
S clock rising edge, I
2
S receive data changes on the I
2
S clock
falling edge
1.11.2 I
2
S interface - Normal I
2
S mode
Normal I
2
S supports:
 16-bit words
 Mono interface
 Configurable sample rate: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48 kHz
Main features of the I
2
S interface in normal I
2
S mode:
 I
2
S word alignment signal always runs at <sample_rate> and synchronizes 2 channels (timeslots
on word alignment high, word alignment low)
 I
2
S transmit data is composed of 16-bit words, dual mono (the words are written on both channels).
Data are in 2’s complement notation. MSB is transmitted first. The bits are written on I
2
S clock
rising or falling edge (configurable)
 I
2
S receive data is read as 16-bit words, mono (words are read only on the timeslot with WA high).
Data is read in 2’s complement notation. MSB is read first. The bits are read on the I
2
S clock edge
opposite to the I
2
S transmit data writing edge (configurable)
 I
2
S clock frequency is 16 bits x 2 channels x <sample_rate>
The modes are configurable through a specific AT command (see the u-blox AT Commands
Manual [2], +UI2S AT command) and the following parameters can be set:
 MSB can be 1 bit delayed or non-delayed on I
2
S word alignment edge
 I
2
S transmit data can change on the rising or falling edge of the I
2
S clock signal (rising edge in this
example)
 I
2
S receive data are read on the opposite front of the I
2
S clock signal