Integration Manual
Table Of Contents
- Document Information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Power management
- 1.6 System functions
- 1.7 RF connection
- 1.8 (U)SIM interface
- 1.9 Serial communication
- 1.9.1 Serial interfaces configuration
- 1.9.2 Asynchronous serial interface (UART)
- 1.9.2.1 UART features
- 1.9.2.2 UART signal behavior
- 1.9.2.3 UART and power-saving
- 1.9.2.4 UART application circuits
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TxD, RxD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TxD, RxD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TxD and RxD lines only (not using the complete V24 link)
- Additional considerations
- 1.9.3 USB interface
- 1.9.4 SPI interface
- 1.9.5 MUX protocol (3GPP TS 27.010)
- 1.10 DDC (I2C) interface
- 1.11 Audio Interface
- 1.12 General Purpose Input/Output (GPIO)
- 1.13 Reserved pins (RSVD)
- 1.14 Schematic for LISA-U2 module integration
- 1.15 Approvals
- 1.15.1 European Conformance CE mark
- 1.15.2 US Federal Communications Commission notice
- 1.15.3 Innovation, Science, Economic Development Canada notice
- 1.15.4 Australian Regulatory Compliance Mark
- 1.15.5 ICASA Certification
- 1.15.6 KCC Certification
- 1.15.7 ANATEL Certification
- 1.15.8 CCC Certification
- 1.15.9 Giteki Certification
- 2 Design-In
- 3 Features description
- 3.1 Network indication
- 3.2 Antenna detection
- 3.3 Jamming Detection
- 3.4 TCP/IP and UDP/IP
- 3.5 FTP
- 3.6 HTTP
- 3.7 SSL/TLS
- 3.8 Dual stack IPv4/IPv6
- 3.9 AssistNow clients and GNSS integration
- 3.10 Hybrid positioning and CellLocate®
- 3.11 Control Plane Aiding / Location Services (LCS)
- 3.12 Firmware update Over AT (FOAT)
- 3.13 Firmware update Over the Air (FOTA)
- 3.14 In-Band modem (eCall / ERA-GLONASS)
- 3.15 SIM Access Profile (SAP)
- 3.16 Smart Temperature Management
- 3.17 Bearer Independent Protocol
- 3.18 Multi-Level Precedence and Pre-emption Service
- 3.19 Network Friendly Mode
- 3.20 Power saving
- 4 Handling and soldering
- 5 Product Testing
- Appendix
- A Migration from LISA-U1 to LISA-U2 series
- A.1 Checklist for migration
- A.2 Software migration
- A.2.1 Software migration from LISA-U1 series to LISA-U2 series modules
- A.3 Hardware migration
- A.3.1 Hardware migration from LISA-U1 series to LISA-U2 series modules
- A.3.2 Pin-out comparison LISA-U1 series vs. LISA-U2 series
- A.3.3 Layout comparison LISA-U1 series vs. LISA-U2 series
- B Glossary
- Related documents
- Revision history
- Contact
LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 78 of 182
1.9.3.3 USB application circuit
Since the module acts as a USB device, the USB supply (5.0 V typ.) must be provided to VUSB_DET by
the connected USB host. The USB interface is enabled only when a valid voltage as a USB supply is
detected by the VUSB_DET input. Neither the USB interface nor the whole module is supplied by the
VUSB_DET input: the VUSB_DET senses the USB supply voltage and absorbs only a few
microamperes.
The USB_D+ and USB_D- lines carry the USB serial data and signaling. The lines are used in single-
ended mode for relatively low speed signaling handshaking, as well as in differential mode for fast
signaling and data transfer.
USB pull-up or pull-down resistors on pins USB_D+ and USB_D- as required by the Universal Serial Bus
Revision 2.0 specification [7] are part of the USB pad driver and do not need to be externally provided.
External series resistors on pins USB_D+ and USB_D- as required by the Universal Serial Bus Revision
2.0 specification [7] are also integrated: characteristic impedance of the USB_D+ and USB_D- lines is
specified by the USB standard. The most important parameter is the differential characteristic
impedance (Z
0
) applicable for an odd-mode electromagnetic field, which should be as close as possible
to 90 differential: signal integrity may be degraded if the PCB layout is not optimal, especially when
the USB signaling lines are very long. The common mode characteristic impedance (Z
CM
) of each USB
data line should be as close as possible to 30 .
LISA-U2 series
VBUS
D+
D-
GND
18
VUSB_DET
27
USB_D+
26
USB_D-
GND
C1
USB DEVICE
CONNECTOR
D1 D2 D3
Figure 40: USB Interface application circuit
Reference
Description
Part Number - Manufacturer
D1, D2, D3
Very Low Capacitance ESD Protection
PESD0402-140 - Tyco Electronics
C2
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R61A104KA01 - Murata
Table 34: Component for USB application circuit
☞ If the USB interface is not connected to the application processor, it is highly recommended to
provide direct access to the VUSB_DET, USB_D+, USB_D- lines for execution of the firmware
upgrade over USB using the u-blox EasyFlash tool and for debugging purposes: testpoints can be
added on the lines to accommodate the access. Otherwise, if the USB interface is connected to
the application processor, it is highly recommended to provide direct access to the RxD, TxD, CTS
and RTS lines for execution of the firmware upgrade over UART and for debugging purposes. In
both cases, provide as well access to RESET_N pin, or to the PWR_ON pin, or enable the DC supply
connected to the VCC pin to start the module firmware upgrade (see the Firmware Update
Application Note [16]).
☞ If the USB interface is not used, the USB_D+, USB_D- and VUSB_DET pins can be left
unconnected, but it is highly recommended to provide direct access to the lines for FW upgrade
and debugging purposes.