Integration Manual
Table Of Contents
- Document Information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Power management
- 1.6 System functions
- 1.7 RF connection
- 1.8 (U)SIM interface
- 1.9 Serial communication
- 1.9.1 Serial interfaces configuration
- 1.9.2 Asynchronous serial interface (UART)
- 1.9.2.1 UART features
- 1.9.2.2 UART signal behavior
- 1.9.2.3 UART and power-saving
- 1.9.2.4 UART application circuits
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TxD, RxD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TxD, RxD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TxD and RxD lines only (not using the complete V24 link)
- Additional considerations
- 1.9.3 USB interface
- 1.9.4 SPI interface
- 1.9.5 MUX protocol (3GPP TS 27.010)
- 1.10 DDC (I2C) interface
- 1.11 Audio Interface
- 1.12 General Purpose Input/Output (GPIO)
- 1.13 Reserved pins (RSVD)
- 1.14 Schematic for LISA-U2 module integration
- 1.15 Approvals
- 1.15.1 European Conformance CE mark
- 1.15.2 US Federal Communications Commission notice
- 1.15.3 Innovation, Science, Economic Development Canada notice
- 1.15.4 Australian Regulatory Compliance Mark
- 1.15.5 ICASA Certification
- 1.15.6 KCC Certification
- 1.15.7 ANATEL Certification
- 1.15.8 CCC Certification
- 1.15.9 Giteki Certification
- 2 Design-In
- 3 Features description
- 3.1 Network indication
- 3.2 Antenna detection
- 3.3 Jamming Detection
- 3.4 TCP/IP and UDP/IP
- 3.5 FTP
- 3.6 HTTP
- 3.7 SSL/TLS
- 3.8 Dual stack IPv4/IPv6
- 3.9 AssistNow clients and GNSS integration
- 3.10 Hybrid positioning and CellLocate®
- 3.11 Control Plane Aiding / Location Services (LCS)
- 3.12 Firmware update Over AT (FOAT)
- 3.13 Firmware update Over the Air (FOTA)
- 3.14 In-Band modem (eCall / ERA-GLONASS)
- 3.15 SIM Access Profile (SAP)
- 3.16 Smart Temperature Management
- 3.17 Bearer Independent Protocol
- 3.18 Multi-Level Precedence and Pre-emption Service
- 3.19 Network Friendly Mode
- 3.20 Power saving
- 4 Handling and soldering
- 5 Product Testing
- Appendix
- A Migration from LISA-U1 to LISA-U2 series
- A.1 Checklist for migration
- A.2 Software migration
- A.2.1 Software migration from LISA-U1 series to LISA-U2 series modules
- A.3 Hardware migration
- A.3.1 Hardware migration from LISA-U1 series to LISA-U2 series modules
- A.3.2 Pin-out comparison LISA-U1 series vs. LISA-U2 series
- A.3.3 Layout comparison LISA-U1 series vs. LISA-U2 series
- B Glossary
- Related documents
- Revision history
- Contact
LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 63 of 182
AT+UPSV
HW flow control
RTS line
DTR line
Communication during idle mode and wake-up
3
Disabled (AT&K0)
ON or OFF
ON
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to
receive data, otherwise data is lost.
3
Disabled (AT&K0)
ON or OFF
OFF
Data sent by the DTE is lost by the module.
Data sent by the module is correctly received by the DTE if it is ready to
receive data, otherwise data is lost.
Table 28: UART and power-saving summary
AT+UPSV=0: power saving disabled, fixed active mode
The module does not enter idle mode and the UART interface is enabled (data can be sent and
received): the CTS line is always held in the ON state after UART initialization. This is the default
configuration.
AT+UPSV=1: power saving enabled, cyclic idle/active mode
When the DTE issues the AT+UPSV=1 command, the UART is immediately disabled.
Afterwards, the UART of LISA-U2 series modules is periodically enabled to receive or send data and,
if data has not been received or sent over the UART, the interface is automatically disabled whenever
possible according to the timeout configured by the second parameter of the +UPSV AT command.
The module automatically enters the low-power idle mode whenever possible but it wakes up to active
mode according to the UART periodic wake-up so that the module cycles between the low-power idle
mode and the active mode. Additionally, the module wakes up to active mode according to any
required activity related to the network or any other required activity related to the functions /
interfaces of the module.
The UART is enabled, and the module does not enter low-power idle mode, in the following cases:
During the periodic UART wake-up to receive or send data
If the module needs to transmit some data over the UART (e.g. URC)
If a character is sent by the DTE with HW flow control disabled, the first character sent causes the
system wake-up due to the “wake-up via data reception” feature described in the following
subsection, and the UART will be then kept enabled after the last data received according to the
timeout set by the second parameter of the AT+UPSV=1 command
The module, outside an active call, periodically wakes up from idle mode to active mode to monitor the
paging channel of the current base station (paging block reception), according to the 2G or 3G
discontinuous reception (DRX) specifications.
The time period between two paging receptions is defined by the current base station (i.e. by the
network):
If the module is registered with a 2G network, the paging reception period can vary from ~0.47 s
(DRX = 2, i.e. 2 x 51 2G-frames) up to ~2.12 s (DRX = 9, i.e. 9 x 51 2G-frames)
If the module is registered with a 3G network, the paging reception period can vary from 0.64 s
(DRX = 6, i.e. 2
6
3G-frames) up to 5.12 s (DRX = 9, i.e. 2
9
3G-frames)
The time period of the UART enable/disable cycle is configured differently when the module is
registered with a 2G network compared to when the module is registered with a 3G network:
2G: the UART is enabled concurrently to a paging reception, and then, as data has not been
received or sent, the UART is disabled until the first paging reception that occurs after a timeout
of 2.0 s, and afterwards the interface is enabled again