Integration Manual
Table Of Contents
- Document Information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Power management
- 1.6 System functions
- 1.7 RF connection
- 1.8 (U)SIM interface
- 1.9 Serial communication
- 1.9.1 Serial interfaces configuration
- 1.9.2 Asynchronous serial interface (UART)
- 1.9.2.1 UART features
- 1.9.2.2 UART signal behavior
- 1.9.2.3 UART and power-saving
- 1.9.2.4 UART application circuits
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TxD, RxD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TxD, RxD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TxD and RxD lines only (not using the complete V24 link)
- Additional considerations
- 1.9.3 USB interface
- 1.9.4 SPI interface
- 1.9.5 MUX protocol (3GPP TS 27.010)
- 1.10 DDC (I2C) interface
- 1.11 Audio Interface
- 1.12 General Purpose Input/Output (GPIO)
- 1.13 Reserved pins (RSVD)
- 1.14 Schematic for LISA-U2 module integration
- 1.15 Approvals
- 1.15.1 European Conformance CE mark
- 1.15.2 US Federal Communications Commission notice
- 1.15.3 Innovation, Science, Economic Development Canada notice
- 1.15.4 Australian Regulatory Compliance Mark
- 1.15.5 ICASA Certification
- 1.15.6 KCC Certification
- 1.15.7 ANATEL Certification
- 1.15.8 CCC Certification
- 1.15.9 Giteki Certification
- 2 Design-In
- 3 Features description
- 3.1 Network indication
- 3.2 Antenna detection
- 3.3 Jamming Detection
- 3.4 TCP/IP and UDP/IP
- 3.5 FTP
- 3.6 HTTP
- 3.7 SSL/TLS
- 3.8 Dual stack IPv4/IPv6
- 3.9 AssistNow clients and GNSS integration
- 3.10 Hybrid positioning and CellLocate®
- 3.11 Control Plane Aiding / Location Services (LCS)
- 3.12 Firmware update Over AT (FOAT)
- 3.13 Firmware update Over the Air (FOTA)
- 3.14 In-Band modem (eCall / ERA-GLONASS)
- 3.15 SIM Access Profile (SAP)
- 3.16 Smart Temperature Management
- 3.17 Bearer Independent Protocol
- 3.18 Multi-Level Precedence and Pre-emption Service
- 3.19 Network Friendly Mode
- 3.20 Power saving
- 4 Handling and soldering
- 5 Product Testing
- Appendix
- A Migration from LISA-U1 to LISA-U2 series
- A.1 Checklist for migration
- A.2 Software migration
- A.2.1 Software migration from LISA-U1 series to LISA-U2 series modules
- A.3 Hardware migration
- A.3.1 Hardware migration from LISA-U1 series to LISA-U2 series modules
- A.3.2 Pin-out comparison LISA-U1 series vs. LISA-U2 series
- A.3.3 Layout comparison LISA-U1 series vs. LISA-U2 series
- B Glossary
- Related documents
- Revision history
- Contact
LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 62 of 182
☞ The AT+UPSV=3 power saving configuration is not supported by the “01” product version.
The different power saving configurations that can be set by the +UPSV AT command are described
in detail in the following subsections. The UART interface communication behaviors for the different
power saving configurations, in relation to the HW flow control settings and RTS input line status, are
summarized in Table 28. For more details on the +UPSV AT command description, see the u-blox AT
commands Manual [2].
AT+UPSV
HW flow control
RTS line
DTR line
Communication during idle mode and wake-up
0
Enabled (AT&K3)
ON
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE.
0
Enabled (AT&K3)
OFF
ON or OFF
Data sent by the DTE should be buffered by the DTE and will be
correctly received by the module when RTS is set to ON.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be
ON).
0
Disabled (AT&K0)
ON or OFF
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to
receive data, otherwise the data is lost.
1
Enabled (AT&K3)
ON
ON or OFF
Data sent by the DTE should be buffered by the DTE and will be
correctly received by the module when active mode is entered.
Data sent by the module is correctly received by the DTE.
1
Enabled (AT&K3)
OFF
ON or OFF
Data sent by the DTE is buffered by the DTE and will be correctly
received by the module when active mode is entered.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be
ON).
1
Disabled (AT&K0)
ON or OFF
ON or OFF
The first character sent by the DTE is lost, but after ~20 ms the UART
and the module are waked up: recognition of subsequent characters is
guaranteed after the complete UART / module wake-up.
Data sent by the module is correctly received by the DTE if it is ready to
receive data, otherwise data is lost.
2
Enabled (AT&K3)
ON or OFF
ON or OFF
Not Applicable: HW flow control cannot be enabled with AT+UPSV=2.
2
Disabled (AT&K0)
ON
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to
receive data, otherwise data is lost.
2
Disabled (AT&K0)
OFF
ON or OFF
Data sent by the DTE is lost by LISA-U2 modules.
The first character sent by the DTE is lost by LISA-U2 modules, but
after ~20 ms the UART and the module are waked up: recognition of
subsequent characters is guaranteed after the complete UART /
module wake-up.
Data sent by the module is correctly received by the DTE if it is ready to
receive data, otherwise data is lost.
3
Enabled (AT&K3)
ON
ON
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE.
3
Enabled (AT&K3)
ON
OFF
Data sent by the DTE is lost by the module.
Data sent by the module is correctly received by the DTE.
3
Enabled (AT&K3)
OFF
ON
Data sent by the DTE is correctly received by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be
ON).
3
Enabled (AT&K3)
OFF
OFF
Data sent by the DTE is lost by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be
ON).