Integration Manual

LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 57 of 182
One-shot automatic frame recognition is supported and enabled in conjunction with the one-shot
automatic baud rate detection only: when the one-shot autobauding is active, the one-shot automatic
frame recognition is enabled overruling the frame format setting. The frame format recognition is
performed once and then, after the successful recognition of the frame format, the automatic frame
recognition is disabled, as the automatic baud rate detection.
☞ One-shot automatic frame recognition is enabled by default as the one-shot autobauding.
The following frame formats can be configured by AT command:
 8N1 (8 data bits, no parity, 1 stop bit), default frame configuration with fixed baud rate
 8E1 (8 data bits, even parity, 1 stop bit)
 8O1 (8 data bits, odd parity, 1 stop bit)
 8N2 (8 data bits, no parity, 2 stop bits)
 7E1 (7 data bits, even parity, 1 stop bit)
 7O1 (7 data bits, odd parity, 1 stop bit)
☞ The 8N2 frame format cannot be automatically detected by one-shot automatic frame
recognition.
The 8N1 frame format, which is the default configuration with a fixed baud rate, is described in Figure
25.
D0 D1 D2 D3 D4 D5 D6 D7
Start of 1-Byte
transfer
Start Bit
(Always 0)
Possible Start of
next transfer
Stop Bit
(Always 1)
t
bit
= 1/(Baudrate)
Normal Transfer, 8N1
Figure 25: Description of the UART default frame format (8N1) with a fixed baud rate
1.9.2.2 UART signal behavior
See Table 5 for a description of operating modes and states referred to in this section.
At the switch-on of the module, before the initialization of the UART interface as described in the
power-on sequence detailed in Figure 18, each pin is first tri-stated and then is set to its specific
internal reset state that is reported in the pin description table in the LISA-U2 series Data Sheet [1].
At the end of the boot sequence, the UART interface is initialized, the module is by default in active
mode and the UART interface is enabled. The configuration and the behavior of the UART signals after
the boot sequence are described below.
☞ For a complete description of data and command mode, see the u-blox AT Commands Manual [2].
RxD signal behavior
The module data output line (RxD) is set by default to OFF state (high level) at UART initialization. The
module holds RxD in OFF state until no data is transmitted by the module.