Integration Manual

LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 55 of 182
1.9.2 Asynchronous serial interface (UART)
The UART interface is a 9-wire unbalanced asynchronous serial interface that provides AT commands
interface, PSD and CSD data communication.
The module firmware can be upgraded over the UART interface using the u-blox EasyFlash tool or by
means of an AT command (for more details, see section 3.1 and Firmware update application
note [16]).
UART interface provides RS-232 functionality conforming to the ITU-T V.24 Recommendation (more
details available in ITU Recommendation [3]), with CMOS compatible signal levels: 0 V for low data bit
or ON state, and 1.8 V for high data bit or OFF state. For detailed electrical characteristics see LISA-U2
series Data Sheet [1].
The LISA-U2 modules are designed to operate as an HSPA cellular modem, which represents the data
circuit-terminating equipment (DCE) as described by the ITU-T V.24 Recommendation [3]. A
customer application processor connected to the module through the UART interface represents the
data terminal equipment (DTE).
☞ The signal names of the LISA-U2 modules UART interface conform to the ITU-T V.24
Recommendation [3].
UART interfaces include the following lines:
Name
Description
Remarks
DSR
Data set ready
Module output
Circuit 107 (Data set ready) in ITU-T V.24
RI
Ring Indicator
Module output
Circuit 125 (Calling indicator) in ITU-T V.24
DCD
Data carrier detect
Module output
Circuit 109 (Data channel received line signal detector) in ITU-T
V.24
DTR
Data terminal ready
Module input
Circuit 108/2 (Data terminal ready) in ITU-T V.24
Internal active pull-up to V_INT (1.8 V) enabled.
RTS
Ready to send
Module hardware flow control input
Circuit 105 (Request to send) in ITU-T V.24
Internal active pull-up to V_INT (1.8 V) enabled.
CTS
Clear to send
Module hardware flow control output
Circuit 106 (Ready for sending) in ITU-T V.24
TxD
Transmitted data
Module data input
Circuit 103 (Transmitted data) in ITU-T V.24
Internal active pull-up to V_INT (1.8 V) enabled.
RxD
Received data
Module data output
Circuit 104 (Received data) in ITU-T V.24
GND
Ground
Table 27: UART interface signals
☞ The UART interface pins’ ESD sensitivity rating is 1 kV (Human Body Model according to JESD22-
A114F). Higher protection levels could be required if the lines are externally accessible on the
application board. Higher protection levels can be achieved by mounting an ESD protection (e.g.
EPCOS CA05P4S14THSG varistor array) on the lines connected to these pins, close to the
accessible points.