Integration Manual
Table Of Contents
- Document Information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Power management
- 1.6 System functions
- 1.7 RF connection
- 1.8 (U)SIM interface
- 1.9 Serial communication
- 1.9.1 Serial interfaces configuration
- 1.9.2 Asynchronous serial interface (UART)
- 1.9.2.1 UART features
- 1.9.2.2 UART signal behavior
- 1.9.2.3 UART and power-saving
- 1.9.2.4 UART application circuits
- Providing the full RS-232 functionality (using the complete V.24 link)
- Providing the TxD, RxD, RTS, CTS and DTR lines only (not using the complete V.24 link)
- Providing the TxD, RxD, RTS and CTS lines only (not using the complete V.24 link)
- Providing the TxD and RxD lines only (not using the complete V24 link)
- Additional considerations
- 1.9.3 USB interface
- 1.9.4 SPI interface
- 1.9.5 MUX protocol (3GPP TS 27.010)
- 1.10 DDC (I2C) interface
- 1.11 Audio Interface
- 1.12 General Purpose Input/Output (GPIO)
- 1.13 Reserved pins (RSVD)
- 1.14 Schematic for LISA-U2 module integration
- 1.15 Approvals
- 1.15.1 European Conformance CE mark
- 1.15.2 US Federal Communications Commission notice
- 1.15.3 Innovation, Science, Economic Development Canada notice
- 1.15.4 Australian Regulatory Compliance Mark
- 1.15.5 ICASA Certification
- 1.15.6 KCC Certification
- 1.15.7 ANATEL Certification
- 1.15.8 CCC Certification
- 1.15.9 Giteki Certification
- 2 Design-In
- 3 Features description
- 3.1 Network indication
- 3.2 Antenna detection
- 3.3 Jamming Detection
- 3.4 TCP/IP and UDP/IP
- 3.5 FTP
- 3.6 HTTP
- 3.7 SSL/TLS
- 3.8 Dual stack IPv4/IPv6
- 3.9 AssistNow clients and GNSS integration
- 3.10 Hybrid positioning and CellLocate®
- 3.11 Control Plane Aiding / Location Services (LCS)
- 3.12 Firmware update Over AT (FOAT)
- 3.13 Firmware update Over the Air (FOTA)
- 3.14 In-Band modem (eCall / ERA-GLONASS)
- 3.15 SIM Access Profile (SAP)
- 3.16 Smart Temperature Management
- 3.17 Bearer Independent Protocol
- 3.18 Multi-Level Precedence and Pre-emption Service
- 3.19 Network Friendly Mode
- 3.20 Power saving
- 4 Handling and soldering
- 5 Product Testing
- Appendix
- A Migration from LISA-U1 to LISA-U2 series
- A.1 Checklist for migration
- A.2 Software migration
- A.2.1 Software migration from LISA-U1 series to LISA-U2 series modules
- A.3 Hardware migration
- A.3.1 Hardware migration from LISA-U1 series to LISA-U2 series modules
- A.3.2 Pin-out comparison LISA-U1 series vs. LISA-U2 series
- A.3.3 Layout comparison LISA-U1 series vs. LISA-U2 series
- B Glossary
- Related documents
- Revision history
- Contact
LISA-U2 series - System Integration Manual
UBX-13001118 - R25 System description Page 38 of 182
1.6.1.2 Low pulse on PWR_ON
When the module is in power-off mode, i.e. it has been cleanly switched off as described in the section
1.6.2 (e.g. by the AT+CPWROFF command) and a voltage within the operating range is maintained at
the VCC pins, the module can be switched on by means of the PWR_ON input pin: a falling edge must
be provided on the PWR_ON pin, which must be then held low for an appropriate time period as
specified in the LISA-U2 series Data Sheet [1].
The electrical characteristics of the PWR_ON input pin are different from the other digital I/O
interfaces; the detailed electrical characteristics are described in the LISA-U2 series Data Sheet [1].
☞ The PWR_ON pin has high input impedance and is weakly pulled to the high level on the module.
Avoid keeping it floating in a noisy environment. To hold the high logic level stable, the PWR_ON
pin must be connected to a pull-up resistor (e.g. 100 kΩ) biased by the V_BCKP supply pin of the
module.
Following are some typical examples of application circuits to turn the module on using the PWR_ON
input pin.
Connecting the PWR_ON input to an external device (e.g. application processor), use an open drain
output on the external device with an external pull-up resistor (e.g. 100 kΩ) biased by V_BCKP supply
pin of the module.
A push-pull output of an application processor can also be used: in this case the pull-up can be used
to pull the PWR_ON level high when the application processor is switched off. If the high-level voltage
of the push-pull output pin of the application processor is greater than the maximum input voltage
operating range of the V_BCKP pin (see the V_BCKP input characteristics of the supply/power pins
table in the LISA-U2 series Data Sheet [1]), the V_BCKP supply cannot be used to bias the pull-up
resistor: the supply rail of the application processor or the VCC supply could be used, but this will
increase the V_BCKP (RTC supply) current consumption when the module is in not-powered mode
(VCC supply not present). Using a push-pull output of the external device, take care to fix the proper
level in all the possible scenarios to avoid an inappropriate switch-on of the module.
1:1 scaling
Open
Drain
Output
Application
processor
LISA-U2 series
Rext
2
V_BCKP
19
PWR_ON
Figure 17: PWR_ON application circuits using an open drain output of an application processor
Reference
Description
Remarks
Rext
100 kΩ Resistor 0402 5% 0.1 W
External pull-up resistor
Table 17: Example of pull-up resistor for the PWR_ON application circuit