Integration Manual

LISA-U2 series - System Integration Manual
UBX-13001118 - R25 Design-In Page 126 of 182
2.2.1.4 Module grounding
Good connection of the module with application board solid ground layer is required for correct RF
performance. It significantly reduces EMC issues and provides a thermal heat sink for the module.
 Connect each GND pin with application board solid GND layer. It is strongly recommended that
each GND pad surrounding VCC pins have one or more dedicated via down to the application board
solid ground layer
 If the application board is a multilayer PCB, then it is required to connect together each GND area
with complete via stack down to main board ground layer
 It is recommended to implement one layer of the application board as ground plane
 Good grounding of GND pads will also ensure thermal heat sink. This is critical during call
connection, when the real network commands the module to transmit at maximum power: proper
grounding helps prevent module overheating
2.2.1.5 Other sensitive pins
A few other pins on the LISA-U2 modules requires careful layout.
 RTC supply (V_BCKP): avoid injecting noise on this voltage domain as it may affect RTC oscillator
stability
 Power-On (PWR_ON): is the digital input to switch-on the LISA-U2 modules. Ensure that the
voltage level is well defined during operation and no transient noise is coupled on this line,
otherwise the module might detect a spurious power-on request
2.2.1.6 High-speed digital pins
The following high speed digital pins require careful layout:
 Serial Peripheral Interface (SPI): can be used for high speed data transfer (UMTS/HSPA) between
the LISA-U2 modules and the host processor, with a data rate up to 26 Mbit/s (see Section 1.9.3).
The high-speed data rate is carried by signals SPI_SCLK, SPI_MISO and SPI_MOSI, while
SPI_SRDY and SPI_MRDY behave as handshake signals with relatively low activity
 Digital Clock Output (CODEC_CLK): can be used to provide a 26 MHz or 13 MHz digital clock to an
external audio codec
Follow these hints for high speed digital pins layout:
 High-speed signals become sources of digital noise, route away from RF and other sensitive analog
signals
 Keep routing short and minimize parasitic capacitance to preserve digital signal integrity
 It is recommended to match the length of SPI signals
2.2.1.7 Digital pins and supplies
 External Reset (RESET_N): input for external reset, a logic low voltage will reset the module
 SIM Card Interface (VSIM, SIM_CLK, SIM_IO, SIM_RST): the SIM layout may be critical if the SIM
card is placed far away from the LISA-U2 modules or in close proximity to the RF antenna. In the
first case the long connection can cause the radiation of some harmonics of the digital data
frequency. In the second case the same harmonics can be picked up and create self-interference
that can reduce the sensitivity of GSM Receiver channels whose carrier frequency is coincidental
with harmonic frequencies. The latter case, placing the RF bypass capacitors, suggested in the
section 1.8, near the SIM connector will mitigate the problem. In addition, since the SIM card is