Installation Instructions

LISA-U2 series - System Integration Manual
UBX-13001118 - R19 Early Production Information System description
Page 41 of 175
Figure 19 describes the module’s power-off sequence, properly started by sending the AT+CPWROFF command,
allowing storage of current parameter settings in the module’s non-volatile memory and a proper network
detach:
 When the +CPWROFF AT command is sent, the module starts the switch-off routine.
 The module replies OK on the AT interface: the switch-off routine is in progress.
 At the end of the switch-off routine, all the digital pins are tri-stated and all the internal voltage regulators
are turned off, including the generic digital interfaces supply (V_INT), except the RTC supply (V_BCKP).
 Then, the module remains in power-off mode as long as a switch on event does not occur (e.g. applying a
proper low level to the PWR_ON input, or applying a proper low level to the RESET_N input), and enters
not-powered mode if the supply is removed from the VCC pins.
VCC
V_BCKP
PWR_ON
RESET_N
V_INT
Internal Reset
System State
BB Pins State Operational
OFF
Tristate / Floating
ON
Operational → Tristate
AT+CPWROFF
sent to the module
0 s
~50 ms
~400 ms
OK
replied by the module
VCC
can be removed
Figure 19: LISA-U2 series Power-off sequence description
The Internal Reset signal is not available on a module pin, but the application can monitor the V_INT pin
to sense the end of the LISA-U2 series power-off sequence.
The duration of each phase in the LISA-U2 series modules’ switch-off routines can largely vary from the
values reported in Figure 19 (e.g. from tens of milliseconds up to tens of seconds), depending on the
application / network settings and the concurrent module activities.
If the AT command +CPWROFF is issued to switch off the module over a multiplexer channel, the
completion of the module power-off sequence could require additionally up to 2.5 s, after the module OK
reply. Therefore, if the Application Processor (AP) controls the VCC supply of the module, the AP should
disable the multiplexer protocol and then issue the AT+CPWROFF command over the used AT interface,
or otherwise the AP should issue the AT+CPWROFF command over a multiplexer channel and wait
additionally 2.5 s after OK reception before removing the module VCC supply.
Tristated pins are always subject to floating caused by noise: to prevent unwanted effects, fix them with
proper pull-up or pull down resistors to stable voltage rails to fix their level when the module is in Power
down state.
Any external signal connected to the UART interface, SPI/IPC interface, I
2
S interfaces and GPIOs must be
tri-stated when the module is in power-down mode, when the external reset is forced low and during the
module power-on sequence (at least for 3 s after the start-up event), to avoid latch-up of circuits and
allow a proper boot of the module. If the external signals connected to the cellular module cannot be tri-
stated, insert a multi channel digital switch (e.g. Texas Instruments SN74CB3Q16244, TS5A3159, or
TS5A63157) between the two-circuit connections and set to high impedance during module power down
mode, when external reset is forced low and during power-on sequence.