Installation Instructions

LISA-U2 series - System Integration Manual
UBX-13001118 - R19 Early Production Information Design-In
Page 117 of 175
2.2.1.1 RF antenna connection
The ANT pin (main RF input/output) and the ANT_DIV pin (RF input for diversity receiver provided by LISA-U230
modules) are very critical in layout design.
Proper transition between ANT and ANT_DIV pads and the application board must be provided, implementing
the following design-in guidelines for the layout of the application PCB close to the ANT and ANT_DIV pads:
 On a multi layer board, the whole layer stack below the RF connection should be free of digital lines
 Increase GND keep-out (i.e. clearance) for ANT and ANT_DIV pads to at least 250 µm up to adjacent pads
metal definition and up to 500 µm on the area below the module, as described in Figure 56
 Add GND keep-out (i.e. clearance) on buried metal layers below ANT and ANT_DIV pads and below any
other pad of component present on the RF line, if top-layer to buried layer dielectric thickness is below
200 µm, to reduce parasitic capacitance to ground (see Figure 56 for the description of the GND keep-out
area below ANT and ANT_DIV pads)
Min. 500 um
Min.
250 um
Top layer Buried metal layer
GND
plane
Microstrip
50 ohm
Figure 56: GND keep-out area on top layer around ANT and ANT_DIV pads and on buried layer below ANT and ANT_DIV pads
The transmission line from the ANT pad and the ANT_DIV pad up to antenna connector(s) or up to the internal
antenna(s) pad must be designed so that the characteristic impedance is as close as possible to 50 .
 The transmission line up to antenna connector or pad may be a microstrip (consists of a conducting strip
separated from a ground plane by a dielectric material) or a strip line (consists of a flat strip of metal which is
sandwiched between two parallel ground planes within a dielectric material). In any case must be designed
to achieve 50 Ω characteristic impedance
 Microstrip lines are usually easier to implement and the reduced number of layer transitions up to antenna
connector simplifies the design and diminishes reflection losses. However, the electromagnetic field extends
to the free air interface above the stripline and may interact with other circuitry
 Buried striplines exhibit better shielding to external and internally generated interferences. They are therefore
preferred for sensitive application. In case a stripline is implemented, carefully check that the via pad-stack
does not couple with other signals on the crossed and adjacent layers
Figure 57 and Figure 58 provide two examples of proper 50  coplanar waveguide designs. The first
transmission line can be implemented in case of 4-layer PCB stack-up herein described, the second transmission
line can be implemented in case of 2-layer PCB stack-up herein described.