User Guide
Table Of Contents
- Document information
- Contents
- 1 LARA-R2 / LARA-R6 modules description
- 2 Migration between LARA modules
- 2.1 Overview
- 2.2 Pin-out comparison between LARA modules
- 2.3 Interfaces comparison between LARA modules
- 2.3.1 VCC module supply input
- 2.3.2 V_INT 1.8 V supply output
- 2.3.3 V_BCKP RTC supply input/output
- 2.3.4 Cellular RF interfaces
- 2.3.5 System control interfaces
- 2.3.6 SIM interface
- 2.3.7 UART interfaces
- 2.3.8 USB interface
- 2.3.9 I2C interface
- 2.3.10 Digital audio interface
- 2.3.11 Clock output
- 2.3.12 GPIOs
- 2.3.13 Antenna dynamic tuning
- 2.3.14 Reserved pins
- 2.3.15 Other considerations and test points
- 2.4 Schematic for LARA modules integration
- Appendix
- A Glossary
- Related documents
- Revision history
- Contact
LARA-R2/R6 migration guide - Application note
UBX-21010015 - R02 Migration between LARA modules Page 21 of 25
C1-Public
2.4 Schematic for LARA modules integration
Figure 6 shows an example of a schematic diagram where a LARA-R2 or a LARA-R6 series module can
be integrated into the same application board, using all the available interfaces and functions of the
modules. The different mounting options for the external parts are noted herein according to the
functions supported by each module.
TXD
RXD
RTS
CTS
DTR
DSR
RI
DCD
GND
12
TXD
9
DTR
13
RXD
10
RTS
11
CTS
6
DSR
7
RI
8
DCD
GND
3V8
GND
330µF
10nF
100nF
82pF
LARA-R2 / LARA-R6
52
VCC
53
VCC
51
VCC
+
100µF
2
V_BCKP / RSVD
GND
GND
GND
RTC
back-up
1.8V DTE
USB 2.0 Host
16
GPIO1
3V8
Network
Indicator
18
RESET_N
Application
Processor
Open
Drain
Output
15
PWR_ON
Open
Drain
Output
D+
D-
29
USB_D+
28
USB_D–
15pF
RSVD
GND
TP
TP
0Ω
0Ω
TP
TP
47pF
SIM Card Holder
VCC (C1)
VPP/SWP (C6)
IO (C7)
CLK (C3)
RST (C2)
GND (C5)
47pF47pF 100nF
41
VSIM
39
SIM_IO
38
SIM_CLK
40
SIM_RST
47pF
SW1
SW2
4
V_INT
42
GPIO5
470k
ESD
ESD
ESD ESD ESD ESD
1k
TP
V_INT
SDIO_CMD / RSVD
SDIO_D0 / RSVD
SDIO_D3 / RSVD
SDIO_D1 / RSVD
46
47
48
49
SDIO_D2 / RSVD
SDIO_CLK / RSVD
44
45
VBUS
17
VUSB_DET
100nF
62
ANT2
59
ANT_DET
10k
Connector
27pF
ESD
Secondary
Cellular
Antenna
33pF
82nH
82nH
56
Connector
Primary
Cellular
Antenna
33pF
ANT1
V_INT
BCLK
LRCLK
Audio Codec
MAX9860
SDIN
SDOUT
SDA
SCL
36
I2S_CLK
34
I2S_WA
35
I2S_TXD
37
I2S_RXD
19
GPIO6 MCLK
IRQn
10k
10µF
1µF
100nF
VDD
SPK
OUTP
OUTN
MIC
MICBIAS
1µF
2.2k
1µF
1µF
MICLN
MICLP
MICGND
2.2k
ESD ESD
V_INT
10nF
10nF
EMI
EMI
27pF
27pF
10nF
EMI
EMI
ESD ESD
27pF
27pF
10nF
33
RSVD
99
HSIC_DATA / RSVD
100
HSIC_STRB / RSVD
21
HOST_SELECT / GND
8.2pF
Mount for modules
supporting 2G / TDD LTE
(~10µF otherwise)
Mount for modules
supporting 2.6 GHz bands
24
GPIO3
V_INT
B A
GND
VCCB VCCA
SN74LVC1T45
Voltage Translator
100nF
100nF
3V0
TxD1
4.7k
IN
OUT
LDO Regulator
SHDNn
4.7k
3V8
3V0
23
GPIO2
V_INT
SDA_A
SDA_B
GND
SCL_A
SCL_B
VCCA
VCCB
TCA9406DCUR
I2C Voltage Translator
100nF
100nF
100nF
47k
SDA2
SCL2
VCC
DIR
OEn
OE
GND
GPIO4
25
4.7k4.7k
u-blox GNSS
3.0 V receiver
26
SDA
27
SCL
GND
0Ω
TP
0Ω
TP
0Ω
TP
15pF
39nH
Optional, 0Ω otherwise
BLM18EG221SN1 or 0Ω
Optional for
LARA-R2
ESD
Not supported by LARA-R204-02B prouct version
Not supported by LARA-R204-02B, LARA-R220-62B and data-only product versions
GPIO
V_INT
Optional, DNI otherwise
0Ω
Mount for
LARA-R2
0Ω
Mount for
LARA-R6
TP
97
RSVD / RFCTL1
98
RSVD / RFCTL2
Figure 6: Example schematic diagram to integrate LARA-R2 / LARA-R6 series modules on the same application board