Data Sheet

JODY-W2 series - Data sheet
UBX-18017567 - R07 Pin definition Page 19 of 46
C1 - Public
Function Pin Name Pin No. Power Type Signal Name Remarks
LPO_IN 60 - I Sleep clock input
32.768 kHz clock
input.
Only supported on
professional grade
variant, JODY-W263-
00B
PG 57 - OD
Open-drain output
from the internal
DC/DC converter,
which indicates the
power quality of the
2.2 V rail. High
impedance indicates
power good. Low level
indicates 2.2V is not in
power good.
A (100kΩ) pull-up
resistor must be
connected to this pin
to detect the power
good state.
GPIOs LTE_COEX_TX 13 VIO O UART TX
Not supported in
current firmware
LTE_COEX_RX 14 VIO I UART RX
Not supported in
current firmware
HOST_WAKE 10 VIO O
Host wake-up signal
output
Asserted: Host device
must wake-up or
remain awake
De-asserted: Host
device can sleep when
the sleep criteria is
met
GPIO_0 42 VIO I/O GPIO
GPIO_2 34 VIO I/O GPIO
GPIO_3 35 VIO I/O GPIO
GPIO_12 11 VIO I/O GPIO
GPIO_13 9 VIO I GPIO
GPIO_14 32 VIO I/O GPIO
GPIO_15 33 VIO I/O GPIO
GPIO_18 40 VIO I/O GPIO
GPIO_19 41 VIO I/O GPIO
GPIO_20 12 VIO I/O GPIO
Radio ANT0 24 VBAT RF Antenna signal Bluetooth
ANT1 29 VBAT RF Antenna signal Wi-Fi Dual Band
ANT2 21 - - Not used Do not connect
ANT3 26 - - Not used Do not connect
Other NC
21, 26, 43, 44, 45,
46, 47 48, 56
- - Reserved Do not connect
Table 15: JODY-W2 series pin description