Data Sheet

JODY-W2 series - Data sheet
UBX-18017567 - R07 Interfaces Page 15 of 46
C1 - Public
2.4 PCM Interface
JODY-W2 series modules include a Pulse Code Modulation (PCM) interface that supports:
 Master or Slave mode
 PCM bit width size of 8 bits or 16 bits
 Up to 4 slots with configurable bit width and start positions
 Short frame and long frame synchronization
 Burst PCM mode
In PCM master mode, the interface generates a 2 MHz or a 2.048 MHz PCM_CLK and 8 kHz
PCM_SYNC signal.
In slave mode, the interface has both PCM_CLK and PCM_SYNC inputs to allow another unit on the
PCM bus generate the signals.
2.4.1 PCM Interface specifications
Figure 9: PCM timing specification – Master mode
Symbol Parameter Condition Min. Typ Max. Units
FBCLK PCM clock frequency - - 2/2.048 - MHz
Duty Cycle
BCLK
- 0.4 0.5 0.6 -
T
BCLK rise/fall
- - - 3 - ns
T
DO
- - - - 15 ns
T
DISU
- - 20 - - ns
T
DIHO
- - 15 - - ns
T
BF
- - - - 15 ns
Table 13: PCM timing specification – Master mode