Data Sheet

JODY-W2 series - Data sheet
UBX-18017567 - R07 Interfaces Page 11 of 46
C1 - Public
Symbol Parameter Condition Min. Typ. Max. Units
t
IH
Input hold time Normal 5 - - ns
High speed 2 - - ns
t
ODLY
Output delay time Normal - - 14 ns
t
ODLY
Output delay time CL ≤ 40
pF (1 card)
High speed - - 14 ns
t
OH
Output hold time High speed 2.5 - - ns
Table 7: SDIO timing data – Default speed, High speed modes (1.8 V)
2.2.2 SDR12, SDR25, SDR50 modes (up to 100 MHz, 1.8 V)
Figure 4: SDIO protocol timing diagram – SDR12, SDR25, SDR50 modes (up to 100 MHz, 1.8 V)
Symbol Parameter Condition Min. Typ. Max. Units
f
PP
Clock frequency SDR12 0 - 25 MHz
SDR25 0 - 50 MHz
SDR50 0 - 100 MHz
t
IS
Input setup time SDR12/25/50 3 - - ns
t
IH
Input hold time SDR12/25/50 0.8 - - ns
t
CLK
Clock time SDR12/25/50 10 - 40 ns
t
CR,
t
CF,
Rise time, fall time
T
CR
, T
CF
< 2 ns (max) at 100 MHz
C
CARD
= 10 pF
SDR12/25/50 - 0.2*T
CLK
ns
t
ODLY
Output delay time
C
L
≤ 30 pF
SDR12/25 - - 14 ns
SDR50 - 7.5
t
OH
Output hold time
C
L
= 15 pF
SDR12/25/50 1.5 - - ns
Table 8: SDIO timing data – SDR12, SDR25, SDR50 modes (up to 100 MHz, 1.8 V)