User Manual

EMMY-W1 series - User Manual
UBX-16015271 - R03 Product Information Interfaces
Page 12 of 46
Symbol
Parameter
Condition
Min.
Typ
Max.
Units
f
PP
Clock frequency
SDR12/25/50
25
-
100
MHz
T
IS
Input setup time
SDR12/25/50
3
-
-
ns
T
IH
Input hold time
SDR12/25/50
0.8
-
-
ns
T
CLK
Clock time
SDR12/25/50
10
-
40
ns
T
CR,
T
CF,
Rise time, fall time
T
CR
, T
CF
< 2 ns (max) at 100 MHz
C
CARD
= 10 pF
SDR12/25/50
-
0.2*T
CLK
ns
T
ODLY
Output delay time
C
L
≤ 30 pF
SDR12/25/50
-
7.5
ns
T
OH
Output hold time
C
L
= 15 pF
SDR12/25/50
1.5
-
-
ns
Table 5: SDIO timing data – SDR12, SDR25, SDR50 modes (up to 100 MHz) (1.8 V)
2.2.3 SDR104 Mode (208 MHz) (1.8 V)
Figure 6: SDIO protocol timing diagram – SDR104 mode (208 MHz)
Symbol
Parameter
Condition
Min.
Typ
Max.
Units
f
PP
Clock frequency
SDR104
0
-
208
MHz
T
IS
Input setup time
SDR104
1.4
-
-
ns
T
IH
Input hold time
SDR104
0.8
-
-
ns
T
CLK
Clock time
SDR104
4.8
-
-
ns
T
CR,
T
CF,
Rise time, fall time
T
CR
, T
CF
< 0.96 ns (max) at 208 MHz
C
CARD
= 10 pF
SDR104
-
0.2*T
CLK
ns
T
OP
Card output phase
SDR104
0
-
10
ns
T
ODW
Output timing of variable data window
SDR104
2.88
-
-
ns
Table 6: SDIO timing data – SDR104 mode (208 MHz)