Data Sheet
Table Of Contents
- Document information
- Contents
- 1 Functional description
- 2 Pin definition
- 3 Electrical specifications
- 4 Firmware
- 5 Mechanical specifications
- 6 RF design notes
- 7 Antenna patterns
- 8 BMD-360 evaluation development kit
- 9 Qualification and approvals
- 10 Environmental
- 11 Product handling
- 12 Labeling and ordering information
- 13 Life support and other high-risk use warning
- Related documents
- Revision history
- Contact
BMD-360 - Data sheet
UBX-19039466 - R03 Electrical specifications Page 11 of 31
• All pins can be used by the PPI task/event system; the maximum number of pins that can be
interfaced through the PPI at the same time is limited by the number of GPIOTE channels
• All pins can be individually configured to carry serial interface or quadrature demodulator signals
Symbol Parameter Min. Typ. Max. Unit
V
IH
Input High Voltage 0.7 x VCC - VCC V
V
IL
Input Low Voltage GND - 0.3 x VCC V
V
OH
Output High Voltage VCC − 0.4 - VCC V
V
OL
Output Low Voltage GND - GND + 0.4 V
R
PU
Pull-up Resistance 11 13 16 kΩ
R
PD
Pull-down Resistance 11 13 16 kΩ
Table 4: GPIO
3.4 Module reset
GPIO pin P0.21 may be used for a hardware reset. In order to utilize P0.21 as a hardware reset, the
UICR registers PSELRESET[0] and PSELRESET[1] must be set alike, to the value of 0x7FFFFF15.
When P0.21 is programmed as RESET, the internal pull-up is automatically enabled. Nordic
Semiconductor example applications and development kits program P0.21 as RESET.
3.5 Debug and programming
The BMD-360 series supports the two pin Serial Wire Debug (SWD) interface and offers flexible and
powerful mechanism for non-intrusive debugging of program code. Breakpoints, single stepping, and
instruction trace capture of code execution flow are part of this support.
The BMD-360 also supports ETM and ITM trace. The trace data from the ETM and the ITM is sent to
an external debugger via a 4-bit wide parallel trace port. In addition to parallel trace, the TPIU supports
serial trace via the Serial Wire Output (SWO) trace protocol.
3.6 Clocks
The BMD-360 requires two clocks, a high frequency clock and a low frequency clock. The high
frequency clock is provided on-module by a high-accuracy 32 MHz crystal as required by the
nRF52811 for radio operation.
The low frequency clock can be provided internally by an RC oscillator or synthesized from the fast
clock, or externally by a 32.768 kHz crystal. An external crystal provides the lowest power
consumption and greatest accuracy. Using the internal RC oscillator with calibration provides
acceptable performance for Bluetooth low energy applications at a reduced cost and slight increase
in power consumption.
☞
The ANT protocol requires the use of an external crystal.
☞
f
TOL_LFXO_BLE
and f
TOL_LFXO_ANT
are the maximum allowed for Bluetooth low energy and ANT
applications. Actual tolerance depends on the crystal used.