Data Sheet

BMD-341 - Data sheet
UBX-19033643 - R03 Electrical specifications Page 18 of 36
Figure 10: BMD-340/341 LiPo-powered HV example with USB charger
⚠ Important: The LiPo circuit above is meant to be a generic example of how the BMD-341’s power
modes can be used. Great care must be taken when integrating Lithium-Ion batteries into a
design. Protection circuits suitable for the type of battery used and the application must always
be implemented.
3.4 General purpose I/O
The general purpose I/O is organized as two ports enabling access and control of the 48 available GPIO
pins. The first port allows access of P0.00 to P0.31, similar to the one port available on the
BMD-300/301. The second port, new to the BMD-341, allows access to P1.00 to P1.15. Each GPIO can
be accessed individually with the following user configurable features:
 Input/output direction
 Output drive strength
 Internal pull-up and pull-down resistors
 Wake-up from high- or low-level triggers on all pins
 Trigger interrupt on all pins
 All pins can be used by the PPI task/event system; the maximum number of pins that can be
interfaced through the PPI at the same time is limited by the number of GPIOTE channels
 All pins can be individually configured to carry serial interface or quadrature demodulator signals
Symbol
Parameter
Min.
Typ.
Max.
Unit
VIH
Input High Voltage
0.7 x VCC
-
VCC
V
VIL
Input Low Voltage
GND
-
0.3 x VCC
V
VOH
Output High Voltage
VCC − 0.4
-
VCC
V
VOL
Output Low Voltage
GND
-
GND + 0.4
V
RPU
Pull-up Resistance
11
13
16
kΩ
RPD
Pull-down Resistance
11
13
16
kΩ
Table 8: GPIO
3.5 Module reset
GPIO pin P0.18 may be used for a hardware reset. In order to utilize P0.18 as a hardware reset, the
UICR registers PSELRESET[0] and PSELRESET[1] must be set alike, to the value of 0x7FFFFFD2.