User's Manual
SARA-R4 series - System Integration Manual
UBX-16029218 - R03 Design-in
Page 70 of 94
2.13 Design-in checklist
This section provides a design-in checklist.
2.13.1 Schematic checklist
The following are the most important points for a simple schematic check:
DC supply must provide a nominal voltage at VCC pin within the operating range limits.
DC supply must be capable of supporting the highest averaged current consumption values in
connected-mode, as specified in the SARA-R4 series Data Sheet [1].
VCC voltage supply should be clean, with very low ripple/noise: provide the suggested bypass capacitors,
in particular if the application device integrates an internal antenna.
Do not apply loads which might exceed the limit for maximum available current from V_INT supply.
Check that voltage level of any connected pin does not exceed the relative operating range.
Provide accessible test points directly connected to the following pins of the SARA-R4 series modules:
V_INT, PWR_ON and RESET_N for diagnostic purpose.
Capacitance and series resistance must be limited on each SIM signal to match the SIM specifications.
Insert the suggested pF capacitors on each SIM signal and low capacitance ESD protections if accessible.
Check UART signals direction, as the modules’ signal names follow the ITU-T V.24 Recommendation [5].
Capacitance and series resistance must be limited on each high speed line of the USB interface.
If the USB is not used, provide accessible test points directly connected to the USB interface (VUSB_DET,
USB_D+ and USB_D- pins).
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k resistor on
the board in series to the GPIO when those are used to drive LEDs.
Provide proper precautions for EMC / ESD immunity as required on the application board.
Do not apply voltage to any generic digital interface pin of SARA-R4 series modules before the switch-
on of the generic digital interface supply source (V_INT).
All unused pins can be left unconnected.