Integration Manual

SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R13 Design-in Page 71 of 119
• Provide a bypass capacitor of about 22 pF to 47 pF (e.g. Murata GRM1555C1H470J) on each SIM line (VSIM, SIM_CLK,
SIM_IO, SIM_RST), very close to each related pad of the SIM connector, to prevent RF coupling especially in case the
RF antenna is placed closer than 10 - 30 cm from the SIM card holder.
• Provide a low capacitance (i.e. less than 10 pF) ESD protection (e.g. Tyco Electronics PESD0402-140) on each
externally accessible SIM line, close to each related pad of the SIM connector. The ESD sensitivity rating of SIM
interface pins is 1 kV (HBM according to JESD22-A114), so that, according to the EMC/ESD requirements of the custom
application, higher protection level can be required if the lines are externally accessible.
• Limit capacitance and series resistance on each SIM signal to match the requirements for the SIM interface (18.7 ns
= maximum rise time on SIM_CLK, 1.0 µs = maximum rise time on SIM_IO and SIM_RST).
SARA-R4/N4
41
VSIM
39
SIM _IO
38
SIM _CLK
40
SIM _RST
4
V_INT
42
GPIO5
SIM CARD
HOLDER
C
5
C
6
C
7
C
1
C
2
C
3
SIM Card
Bot t om View
(cont act s side)
C1
VPP (C6)
VCC (C1)
IO (C7)
CLK (C3)
RST (C2)
GND (C5)
C2 C3 C5
J 1
C4
SW 1
SW 2
D1 D2 D3 D4 D5 D6
R2
R1
C
8
C
4
TP
Figure 39: Application circuit for the connection to a single removable SIM card, with SIM detection implemented
Reference Description Part Number - Manufacturer
C1, C2, C3, C4 47 pF Capacitor Ceramic C0G 0402 5% 50 V GRM1555C1H470JA01 - Murata
C5 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C104KA01 - Murata
D1 – D6 Very Low Capacitance ESD Protection PESD0402-140 - Tyco Electronics
R1
1 kΩ Resistor 0402 5% 0.1 W
RC0402JR-071KL - Yageo Phycomp
R2
470 kΩ Resistor 0402 5% 0.1 W
RC0402JR-07470KL- Yageo Phycomp
J1 SIM Card Holder
6 + 2 positions, with card presence switch
Various Manufacturers,
CCM03-3013LFT R102 - C&K Components
Table 28: Example of components for the connection to a single removable SIM card, with SIM detection implemented
2.5.2 Guidelines for SIM layout design
The layout of the SIM card interface lines (VSIM, SIM_CLK, SIM_IO, SIM_RST may be critical if the SIM card is placed far
away from the SARA-R4/N4 series modules or in close proximity to the RF antenna: these two cases should be avoided
or at least mitigated as described below.
In the first case, the long connection can cause the radiation of some harmonics of the digital data frequency as any other
digital interface. It is recommended to keep the traces short and avoid coupling with RF line or sensitive analog inputs.
In the second case, the same harmonics can be picked up and create self-interference that can reduce the sensitivity of
LTE receiver channels whose carrier frequency is coincidental with harmonic frequencies. It is strongly recommended to
place the RF bypass capacitors suggested in Figure 37 near the SIM connector.
In addition, since the SIM card is typically accessed by the end user, it can be subjected to ESD discharges. Add adequate
ESD protection as suggested to protect module SIM pins near the SIM connector.
Limit capacitance and series resistance on each SIM signal to match the SIM specifications. The connections should always
be kept as short as possible.
Avoid coupling with any sensitive analog circuit, since the SIM signals can cause the radiation of some harmonics of the
digital data frequency.