Integration Manual

SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R13 Design-in Page 59 of 119
2.4.1.2 Guidelines for antenna RF interface design
Guidelines for ANT pin RF connection design
A clean transition between the ANT pad and the application board PCB must be provided, implementing the following
design-in guidelines for the layout of the application PCB close to the ANT pad:
• On a multilayer board, the whole layer stack below the RF connection should be free of digital lines
• Increase GND keep-out (i.e. clearance, a void area) around the ANT pad, on the top layer of the application PCB, to
at least 250 µm up to adjacent pads metal definition and up to 400 µm on the area below the module, to reduce
parasitic capacitance to ground, as described in the left picture in Figure 31
• Add GND keep-out (i.e. clearance, a void area) on the buried metal layer below the ANT pad if the top-layer to buried
layer dielectric thickness is below 200 µm, to reduce parasitic capacitance to ground, as described in the right picture
in Figure 31
M in.
250 µm
M in. 40 0 µm
GND
ANT
GND clearance
on buried layer very close t o t op layer
below ANT pad
GND clearance
on t op layer
around ANT pad
Figure 31: GND keep-out area on top layer around ANT pad and on very close buried layer below ANT pad
Guidelines for RF transmission line design
Any RF transmission line, such as the ones from the ANT pad up to the related antenna connector or up to the related
internal antenna pad, must be designed so that the characteristic impedance is as close as possible to 50 Ω.
RF transmission lines can be designed as a micro strip (consists of a conducting strip separated from a ground plane by a
dielectric material) or a strip line (consists of a flat strip of metal which is sandwiched between two parallel ground planes
within a dielectric material). The micro strip, implemented as a coplanar waveguide, is the most common configuration
for printed circuit board.
Figure 32 and Figure 33 provide two examples of suitable 50 Ω coplanar waveguide designs. The first example of RF
transmission line can be implemented in case of 4-layer PCB stack-up herein described, and the second example of RF
transmission line can be implemented in case of 2-layer PCB stack-up herein described.
35 µm
35 µm
35 µm
35 µm
270 µm
270 µm
760 µm
L1 Copper
L3 Copper
L2 Copper
L4 Copper
FR-4 dielect ric
FR-4 dielect ric
FR-4 dielect ric
380 µm 50 0 µm500 µm
Figure 32: Example of 50 Ω
ΩΩ
Ω coplanar waveguide transmission line design for the described 4-layer board layup