Integration Manual

SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R13 System description Page 14 of 119
1.4 Operating modes
SARA-R4/N4 series modules have several operating modes. The operating modes are defined in Table 4 and described in
detail in Table 5, providing general guidelines for operation.
General Status Operating Mode Definition
Power-down Not-Powered Mode VCC supply not present or below operating range: module is switched off.
Power-Off Mode VCC supply within operating range and module is switched off.
Normal Operation Deep-Sleep Mode RTC runs with 32 kHz reference internally generated.
Idle Mode Module processor runs with 32 kHz reference generated by the internal oscillator.
Active Mode Module processor runs with 19.2 MHz reference generated by the internal oscillator.
Connected Mode RF Tx/Rx data connection enabled and processor core runs with 19.2 MHz reference.
Table 4: SARA-R4/N4 series modules operating modes definition
Mode Description Transition between operating modes
Not-Powered Module is switched off.
Application interfaces are not accessible.
When VCC supply is removed, the modules enter not-powered mode.
When in not-powered mode, the module can enter power-off mode applying
VCC supply (see 1.6.1).
Power-Off Module is switched off: normal shutdown by an
appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
The modules enter power-off mode from active mode when the host
processor implements a clean switch-off procedure, by sending the
AT+CPWROFF command or by using the PWR_ON pin (see 1.6.2).
When in power-off mode, the modules can be switched on by the host
processor using the PWR_ON input pin (see 1.6.1).
When in power-off mode, the modules enter not-powered mode by
removing VCC supply.
Deep-Sleep Only the internal 32 kHz reference is active.
The RF section and the application interfaces are
temporarily disabled and switched off: the module is
temporarily not ready to communicate with an
external device by means of the application
interfaces as configured to reduce the current
consumption.
The module enters the low power deep sleep mode
(entering the Power Saving Mode defined in 3GPP
Rel.13) whenever possible, if power saving
configuration is enabled by AT+CPSMS command
(see the SARA-R4/N4 series AT Commands Manual
[2]), reducing current consumption (see 1.13.9).
Power saving configuration is not enabled by default;
it can be enabled by AT+CPSMS (see the SARA-R4/N4
series AT Commands Manual [2]).
The modules automatically switch from the active mode to low power deep
sleep mode whenever possible, upon expiration of the 6 seconds AT
inactivity timer, and upon expiration of “Active Timer”, entering in the Power
Saving Mode defined in 3GPP Rel.13, if power saving configuration is enabled
(see 1.13.9 and the SARA-R4/N4 series AT Commands Manual [2], AT+CPSMS
command).
When in low power deep sleep mode, the module switches on to the active
mode upon expiration of “Periodic Update Timer” according to the Power
Saving Mode defined in 3GPP Rel.13 (see 1.13.9 and the SARA-R4/N4 series
AT Commands Manual [2], AT+CPSMS command), or it can be switched on to
the active mode by the host processor using the PWR_ON input pin (see
section 1.6.1).
Idle Module is switched on with application interfaces
temporarily disabled: the module is temporarily not
ready to communicate with an external device by
means of the application interfaces as configured to
reduce the current consumption.
The module enters the low power idle mode
whenever possible, if low power configuration is
enabled by AT+UPSV command (see the SARA-R4/N4
series AT Commands Manual [2]), reducing current
consumption.
Low power configuration is not enabled by default; it
can be enabled by AT+UPSV (see the SARA-R4/N4
series AT Commands Manual [2]).
The modules automatically switch from the active mode to low power idle
mode whenever possible, upon expiration of the 6 seconds AT inactivity
timer, if low power configuration is enabled (see the SARA-R4/N4 series AT
Commands Manual [2], AT+UPSV command).
When in low power idle mode, the module switches to the active mode upon
data reception over UART serial interface. The first character received in low
power idle mode wakes up the system: it is not recognized as valid
communication character, and the recognition of the subsequent characters
is guaranteed only after the complete system wake-up.