Integration Manual

SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R13 Appendix Page 113 of 119
No SARA-G3
Pin Name Description
SARA-U2
Pin Name Description
SARA-R4
Pin Name Description
SARA-N2
Pin Name Description Remarks for migration
34 I2S_WA / RSVD I
2
S Word Align.(G340/G350)
Reserved (G300/G310)
V_INT level (1.8 V)
Driver strength: 6 mA
I2S_WA I
2
S Word Alignment
V_INT level (1.8 V)
Driver strength: 2 mA
I2S_WA /
SPI_MOSI
I
2
S Word Alignm
38
/ SPI MOSI
38
V_INT level (1.8 V)
Driver strength: 2 mA
RSVD Reserved I2S vs SPI vs Reserved
35 I2S_TXD / RSVD I
2
S Data Output (G340/G350)
Reserved (G300/G310)
V_INT level (1.8 V)
Driver strength: 5 mA
I2S_TXD I
2
S Data Output
V_INT level (1.8 V)
Driver strength: 2 mA
I2S_TXD /
SPI_CS
I
2
S Data Out
38
/ SPI chip select
38
V_INT level (1.8 V)
Driver strength: 2 mA
RSVD Reserved I2S vs SPI vs Reserved
36 I2S_CLK / RSVD I
2
S Clock (G340/G350) Reserved
(G300/G310)
V_INT level (1.8 V)
Driver strength: 5 mA
I2S_CLK I
2
S Clock
V_INT level (1.8 V)
Driver strength: 2 mA
I2S_CLK /
SPI_CLK
I
2
S Clock
38
/ SPI clock
38
V_INT level (1.8 V)
Driver strength: 2 mA
RSVD Reserved I2S vs SPI vs Reserved
37 I2S_RXD / RSVD I
2
S Data Input (G340/G350)
Reserved (G300/G310)
V_INT level (1.8 V)
I2S_RXD I
2
S Data Input
V_INT level (1.8 V)
I2S_RXD /
SPI_MISO
I
2
S Data Input
38
/ SPI MISO
38
V_INT level (1.8 V)
RSVD Reserved I2S vs SPI vs Reserved
38 SIM_CLK 1.8V/3V SIM Clock Output SIM_CLK 1.8V/3V SIM Clock Output SIM_CLK 1.8V/3V SIM Clock Output SIM_CLK 1.8V SIM Clock Output
39 SIM_IO 1.8V/3V SIM Data I/O
Internal 4.7 k pull-up
SIM_IO 1.8V/3V SIM Data I/O
Internal 4.7 k pull-up
SIM_IO 1.8V/3V SIM Data I/O
Internal 4.7 k pull-up
SIM_IO 1.8V SIM Data I/O
Internal 4.7 k pull-up
40 SIM_RST 1.8V/3V SIM Reset Output SIM_RST 1.8V/3V SIM Reset Output SIM_RST 1.8V/3V SIM Reset Output SIM_RST 1.8V SIM Reset Output
41 VSIM 1.8V/3V SIM Supply Output VSIM 1.8V/3V SIM Supply Output VSIM 1.8V/3V SIM Supply Output VSIM 1.8V SIM Supply Output
42 SIM_DET SIM Detection Input
V_INT level (1.8 V)
SIM_DET SIM Detection Input
V_INT level (1.8 V)
GPIO5 SIM Detection Input
V_INT level (1.8 V)
RSVD Reserved SIM Detection vs Reserved
43 GND Ground GND Ground GND Ground GND Ground
44 SPK_P / RSVD Analog Audio Out (+) / Reserved RSVD Reserved SDIO_D2 SDIO serial data [2]
38
RSVD Reserved Analog Audio vs SDIO vs RSVD
45 SPK_N / RSVD Analog Audio Out (-) / Reserved RSVD Reserved SDIO_CLK SDIO serial clock
38
RSVD Reserved Analog Audio vs SDIO vs RSVD
46 MIC_BIAS /
RSVD
Microphone Supply Out /
Reserved
RSVD Reserved SDIO_CMD SDIO command
38
RSVD Reserved Analog Audio vs SDIO vs RSVD
47 MIC_GND /
RSVD
Microphone Ground / Reserved RSVD Reserved SDIO_D0 SDIO serial data [0]
38
RSVD Reserved Analog Audio vs SDIO vs RSVD
48 MIC_N / RSVD Analog Audio In (-) /
Reserved
RSVD Reserved SDIO_D3 SDIO serial data [3]
38
RSVD Reserved Analog Audio vs SDIO vs RSVD
49 MIC_P / RSVD Analog Audio In (+) /
Reserved
RSVD Reserved SDIO_D1 SDIO serial data [1]
38
RSVD Reserved Analog Audio vs SDIO vs RSVD
50 GND Ground GND Ground GND Ground GND Ground
38
Not supported by “00”, “01” and “x2” product version