User's Manual

SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R18 Advance Information System description
Page 12 of 206
Memory
V_BCKP (RTC)
V_INT (I/O)
RF
Transceiver
Power
Management
Cellular
BaseBand
Processor
ANT
VCC (Supply)
USB
DDC (I
2
C)
SIM card detection
SIM
UART
Power-On
Reset
Digital audio (I
2
S)
GPIO
Antenna detection
3G PA
26 MHz
Duplexer
Filter
Switch
LNA
32.768 kHz
Figure 5: SARA-U280 modules block diagram
1.2.1 Internal blocks
SARA-G3 and SARA-U2 series modules internally consist of the RF, Baseband and Power Management sections
here described with more details than the simplified block diagrams of Figure 1 to Figure 5.
RF section
The RF section is composed of the following main elements:
x 2G / 3G RF transceiver performing modulation, up-conversion of the baseband I/Q signals, down-conversion
and demodulation of the RF received signals. The RF transceiver includes:
Constant gain direct conversion receiver with integrated LNAs
Highly linear RF quadrature GMSK demodulator
Digital Sigma-Delta transmitter GMSK modulator
Fractional-N Sigma-Delta RF synthesizer
3.8 GHz VCO
Digital controlled crystal oscillator
x 2G / 3G Power Amplifier, which amplifies the signals modulated by the RF transceiver
x RF switch, which connects the antenna input/output pin (ANT) of the module to the suitable RX/TX path
x RX diplexer SAW (band pass) filters
x 26 MHz crystal, connected to the digital controlled crystal oscillator to perform the clock reference in
active-mode or connected-mode
Baseband and Power Management section
The Baseband and Power Management section is composed of the following main elements:
x Baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions
DSP core for 2G / 3G Layer 1 and audio processing
Dedicated peripheral blocks for parallel control of the digital interfaces