Datasheet

TMC8462 Datasheet Document Revision V1.5 2019-June-21
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6.4.16.3 System Time Oset (0x0920:0x0927)
Bit Description ECAT PDI Reset Value
63:0
Dierence between local time and System
Time. Oset is added to the local time.
r/(w) r/(w)
Table 92: Register 0x0920:0x0927 (Sys Time Oset)
Note
Write access to this register depends upon ESC conguration (typically ECAT, PDI
only with explicit ESC conguration: System Time PDI controlled). Reset internal
system time dierence lter and speed counter lter by writing Speed Counter
Start (0x0930:0x0931) after changing this value.
6.4.16.4 System Time Delay (0x0928:0x092B)
Bit Description ECAT PDI Reset Value
31:0 Delay between Reference Clock and the ESC r/(w) r/(w)
Table 93: Register 0x0928:0x092B (Sys Time Delay)
Note
Write access to this register depends upon ESC conguration (typically ECAT, PDI
only with explicit ESC conguration: System Time PDI controlled). Reset internal
system time dierence lter and speed counter lter by writing Speed Counter
Start (0x0930:0x0931) after changing this value.
6.4.16.5 System Time Dierence (0x092C:0x092F)
Bit Description ECAT PDI Reset Value
30:0
Mean dierence between local copy of System
Time and received System Time values
r/- r/-
31
0: Local copy of System Time greater than or
equal received System Time
1: Local copy of System Time smaller than re-
ceived System Time
r/- r/-
Table 94: Register 0x092C:0x092F (Sys Time Di)
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