Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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6.4.15 Distributed Clocks Receive Times
Depending on the available width of the Distributed Clocks feature the time stamp registers are either 32
bit (4 bytes) or 64 bits (8 bytes) wide. Please check the feature summary of the respective TRINAMIC ESC
device.
6.4.15.1 Receive Time Port 0 (0x0900:0x0903)
Bit Description ECAT PDI Reset Value
31:0 Write:
A write access to register 0x0900 with BWR or
FPWR latches the local time of the beginning of
the receive frame (start first bit of preamble) at
each port.
Read:
Local time of the beginning of the last receive
frame containing a write access to this register.
r/w
(special
func-
tion)
r/-
Table 88: Register 0x0900:0x0903 (Rcv Time P0)
Note
The time stamps cannot be read in the same frame in which this register was
written.
6.4.15.2 Receive Time Port 1 (0x0904:0x0907)
Bit Description ECAT PDI Reset Value
31:0 Local time of the beginning of a frame (start
first bit of preamble) received at port 1 contain-
ing a BWR or FPWR to Register 0x0900.
r/- r/-
Table 89: Register 0x0904:0x0907 (Rcv Time P1)
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