Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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6.4.13.3 Logical Start bit (+0x6)
Bit Description ECAT PDI Reset Value
2:0 Logical starting bit that shall be mapped (bits
are counted from least significant bit (=0) to
most significant bit(=7)
r/w r/-
7:3 Reserved, write 0 r/- r/-
Table 74: Register 0x06y6 (Log. Start Bit)
6.4.13.4 Logical Stop bit (+0x7)
Bit Description ECAT PDI Reset Value
2:0 Last logical bit that shall be mapped (bits are
counted from least significant bit (=0) to most
significant bit(=7)
r/w r/-
7:3 Reserved, write 0 r/- r/-
Table 75: Register 0x06y7 (Log. Stop Bit))
6.4.13.5 Physical Start Address (+0x8:0x9)
Bit Description ECAT PDI Reset Value
Physical Start Address (mapped to logical Start
address)
r/w r/-
Table 76: Register 0x06y8:0x06y9 (Phy. Start Addr
6.4.13.6 Physical Start bit (+0xA)
Bit Description ECAT PDI Reset Value
2:0 Physical starting bit as target of logical start bit
mapping (bits are counted from least signifi-
cant bit (=0) to most significant bit(=7)
r/w r/-
7:3 Reserved, write 0 r/- r/-
Table 77: Register 0x06yA (Phy. Start Bit)
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