Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
69 / 204
Bit Description ECAT PDI Reset Value
3 AL Status event:
0: No change in AL Status
1: AL Status change
(Bit is cleared by reading out AL Status
0x0130:0x0131 from ECAT)
r/- r/-
4
5
...
Mirrors values of each SyncManager Status:
0: No Sync Channel 0 event
1: Sync Channel 0 event pending
0: No Sync Channel 1 event
1: Sync Channel 1 event pending
. . .
0: No Sync Channel 7 event
1: Sync Channel 7 event pending
r/w r/-
15:12 Reserved r/- r/-
Table 42: Register 0x0210:0x0211 (ECAT Event R.)
6.4.7.4 AL Event Request (0x0220:0x0223)
Bit Description ECAT PDI Reset Value
0 AL Control event:
0: No AL Control Register change
1: AL Control Register has been written
1
(Bit is cleared by reading AL Control register
0x0120:0x0121 from PDI)
r/- r/-
1 DC Latch event:
0: No change on DC Latch Inputs
1: At least one change on DC Latch Inputs
(Bit is cleared by reading DC Latch event
times from PDI, so that Latch 0/1 Status
0x09AE:0x09AF indicates no event. Available
if Latch Unit is PDI controlled)
r/- r/-
2 State of DC SYNC0 (if register 0x0151.3=1):
(Bit is cleared by reading SYNC0 status 0x098E
from PDI, use only in Acknowledge mode)
r/- r/-
3 State of DC SYNC1 (if register 0x0151.7=1):
(Bit is cleared by reading of SYNC1 status
0x098F from PDI, use only in Acknowledge
mode)
r/- r/-
1
AL control event is only generated if PDI emulation is turned off (PDI Control register 0x0140.8=0)
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