Datasheet

TMC8462 Datasheet • Document Revision V1.5 • 2019-June-21
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Address Length
(Byte)
Description
DC LATCH In Unit
0x09A8 1 Latch0 Control
0x09A9 1 Latch1 Control
0x09AE 1 Latch0 Status
0x09AF 1 Latch1 Status
0x09B0:0x09B7 4/8 Latch0 Time Positive Edge
0x09B8:0x09BF 4/8 Latch0 Time Negative Edge
0x09C0:0x09C7 4/8 Latch1 Time Positive Edge
0x09C8:0x09CF 4/8 Latch1 Time Negative Edge
DC SyncManager Event Times
0x09F0:0x09F3 4 EtherCAT Buffer Change Event Time
0x09F8:0x09FB 4 PDI Buffer Start Event Time
0x09FC:0x09FF 4 PDI Buffer Change Event Time
0x0E00:0x0EFF 256 ESC Specific
0x0E00:0x0E07 8 Product ID
0x0E08:0x0E0F 8 Vendor ID
0x0F80:0x0FFF 128 User RAM
0x0F80:0x0FFF 20 reserved
Process Data RAM
0x1000:0xFFFF 1-60KB Process Data RAM
Table 8: TMC8462 EtherCAT Registers
For Registers longer than one byte, the LSB has the lowest and MSB the highest address.
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